Xilinx · L0Xie-RHIT · Nov 29, 2024 · Nov 29, 2024 · Mar 21, 2025 · Mar 24, 2025
diff --git a/dsp/Jenkinsfile b/dsp/Jenkinsfile
@@ -1,7 +1,7 @@
 @Library('pipeline-library')_
 
-VitisLibPipeline (branch: 'next', libname: 'xf_dsp', TARGETS: 'hls_csim:hls_csynth:hls_cosim:vitis_sw_emu:vitis_hw_emu:vitis_hw_build:vitis_aie_sim:vitis_aie_x86sim',
-                  upstream_dependencies: 'xf_utils_hw,next,../utils; xf_data_mover,next,../data_mover; dsplib_internal_scripts,main,../dsplib_internal_scripts',
-                  devtest: 'RunDeploy.sh', TOOLVERSION: '2024.2_stable_latest',
+VitisLibPipeline (branch: 'main', libname: 'xf_dsp', TARGETS: 'hls_csim:hls_csynth:hls_cosim:vitis_sw_emu:vitis_hw_emu:vitis_hw_build:vitis_aie_sim:vitis_aie_x86sim',
+                  upstream_dependencies: 'xf_utils_hw,main,../utils; xf_data_mover,main,../data_mover; dsplib_internal_scripts,main,../dsplib_internal_scripts',
+                  devtest: 'RunDeploy.sh', TOOLVERSION: '2024.2_released',
                   email: '[email protected]',
                   post_launch: '../dsplib_internal_scripts/scripts/jenkins/post_launch_wrapper.sh |& tee -a reporting_log.txt')
diff --git a/dsp/L1/include/aie/fir_tdm.hpp b/dsp/L1/include/aie/fir_tdm.hpp
@@ -200,10 +200,7 @@ class kernelFilterClass {
 #if __HAS_ACCUM_PERMUTES__ == 1
     // cint16/int16 combo can be overloaded with 2 column MUL/MACs.
     static constexpr unsigned int columnMultiple =
-        (std::is_same<TT_DATA, cint16>::value && std::is_same<TT_COEFF, int16>::value) &&
-                (TP_TDM_CHANNELS > m_kVOutSize) && (TP_TDM_CHANNELS % (2 * m_kVOutSize) == 0)
-            ? 2
-            : 1;
+        (std::is_same<TT_DATA, cint16>::value && std::is_same<TT_COEFF, int16>::value) ? 2 : 1;
     static constexpr unsigned int coeffToDataMultiple = 1;
 #else
     static constexpr unsigned int columnMultiple = 1;
@@ -256,11 +253,7 @@ class kernelFilterClass {
     // Operate on multiple frames in parallel, when possible.
     // Optimized to reduce data loads, handy when 512-bits of data and 256-bits of coeffs are needed on each clock
     // cycle.
-    static constexpr unsigned int useEvenFrames =
-        (TP_NUM_FRAMES % 2 == 0 && columnMultiple == 2 && TP_TDM_CHANNELS > m_kVOutSize &&
-         TP_TDM_CHANNELS % kSamplesInVectData == 0)
-            ? 1
-            : 0;
+    static constexpr unsigned int useEvenFrames = (TP_NUM_FRAMES % 2 == 0 && columnMultiple == 2) ? 1 : 0;
     // TDM FIR Margin = (TP_FIR_LEN-1)*TP_TDM_CHANNELS
     // or set to 0, if handled with internal buffer.
     static constexpr unsigned int enableInternalMargin = __HAS_ACCUM_PERMUTES__ ? 1 : 0;

diff --git a/dsp/L1/src/aie/fir_tdm.cpp b/dsp/L1/src/aie/fir_tdm.cpp
@@ -547,7 +547,6 @@ INLINE_DECL void kernelFilterClass<TT_DATA,
                     // Rewind by
                     inRdItr -= (TP_FIR_RANGE_LEN)*TP_TDM_LOOP_SIZE - 1;
                 }
-            // inRdItr += m_kFirCoeffOffset * columnMultiple * TP_TDM_CHANNELS / kSamplesInVectData;
         }
 };
 
@@ -615,22 +614,38 @@ kernelFilterClass<TT_DATA,
     using accVect_t = ::aie::accum<typename tTDMAccBaseType<TT_DATA, TT_COEFF>::type, kSamplesInVectAcc>;
 
     dataVect_t dataVect;
-    dataVect_t* __restrict inPointer;
+    dataRead_t* __restrict inPointer;
     outDataVect_t outVect, outVect2;
     coeffVect_t* __restrict coeffVectPtr;
 
     coeffVect_t coeffVect;
     accVect_t acc, acc2;
     input_circular_buffer<TT_DATA, extents<internalBufferSize>, margin<0> > inWindowCirc(&m_inputBuffer[0],
                                                                                          internalBufferSize, 0);
-    auto inWrItr = ::aie::begin_vector_random_circular<kSamplesInVectData>(m_inputBuffer, internalBufferSize);
-    auto inRdItr = ::aie::begin_vector_random_circular<kSamplesInVectAcc>(inWindowCirc);
+    auto inWrItr = ::aie::begin_vector_random_circular<kSamplesInVectAcc>(m_inputBuffer, internalBufferSize);
+    auto inRdItr = ::aie::begin_vector_random_circular<kSamplesInVectAcc>(m_inputBuffer, internalBufferSize);
     dataVect_t* frameStart = (dataVect_t*)inInterface.inWindow;
-    // #undef _DSPLIB_FIR_TDM_HPP_DEBUG_
 
-    inWrItr += (marginFrame)*TP_TDM_CHANNELS / kSamplesInVectData;
+    inWrItr += (marginFrame)*TP_TDM_CHANNELS / kSamplesInVectAcc;
     int readIncr = ((marginFrame + 2 + m_kFirCoeffOffset)) * columnMultiple * TP_TDM_CHANNELS / kSamplesInVectData;
     inRdItr += readIncr;
+    // precalculate margin frame prior to jumping into inner loop.
+    // Alternatively, calculate margin frame within inner loop, to avoid a costly div.
+    // Calculating frame margin inside inner loop benefits cases that operate on a fairly small number of frames.
+    constexpr unsigned int precalculatedMarginFrame = (TP_NUM_FRAMES > internalBufferFrames) ? 1 : 0;
+    if
+        constexpr(m_kFirMargin == 0) {
+            if
+                constexpr(precalculatedMarginFrame == 1) {
+                    marginFrame = (((marginFrame + TP_NUM_FRAMES) >= internalBufferFrames)
+                                       ? ((marginFrame + TP_NUM_FRAMES) % internalBufferFrames)
+                                       : (marginFrame + TP_NUM_FRAMES));
+                }
+        }
+    else {
+        // Margin has been copied externally and is as part of the window
+        marginFrame = 0;
+    }
 
     // Loop through 2 frames at a time
     for (int frame = 0; frame < TP_NUM_FRAMES / 2; frame++)
@@ -640,25 +655,23 @@ kernelFilterClass<TT_DATA,
                     // Embed margin handling here, as this would reduce the amount of buffer size.
 
                     for (int j = 0; j < 2; j++) {
-                        dataVect_t* frameStart =
-                            (dataVect_t*)inInterface.inWindow + j * TP_TDM_CHANNELS / kSamplesInVectData;
+                        dataRead_t* frameStart =
+                            (dataRead_t*)inInterface.inWindow + j * TP_TDM_CHANNELS / kSamplesInVectAcc;
                         // Copy margin for 2 frames at a time
-                        for (int i = 0; i < TP_TDM_CHANNELS / kSamplesInVectData; i++) {
-                            inPointer =
-                                ((dataVect_t*)frameStart) + i + 2 * frame * TP_TDM_CHANNELS / kSamplesInVectData;
+                        for (int i = 0; i < TP_TDM_CHANNELS / kSamplesInVectAcc; i++) {
+                            inPointer = ((dataRead_t*)frameStart) + i + 2 * frame * TP_TDM_CHANNELS / kSamplesInVectAcc;
                             // dataVect = *inPointer;
                             // *inWrItr++ = dataVect;
                             *inWrItr++ = *inPointer;
                         }
                         // Copying 2 frames at a time.
-                        marginFrame = (marginFrame == (internalBufferFrames - 1) ? 0 : marginFrame + 1);
+                        if
+                            constexpr(precalculatedMarginFrame == 0) {
+                                marginFrame = (marginFrame == (internalBufferFrames - 1) ? 0 : marginFrame + 1);
+                            }
                     }
-                    chess_memory_fence();
+                    chess_separator_scheduler();
                 }
-            else {
-                // Margin has been copied externally and is as part of the window
-                marginFrame = 0;
-            }
             // Read once, prior to the loop
             if
                 constexpr(columnMultiple == 2) {
@@ -713,7 +726,6 @@ kernelFilterClass<TT_DATA,
                         }
                     if
                         constexpr(TP_CASC_IN == CASC_IN_TRUE) {
-                            // acc = (accVect_t)readincr_v<kSamplesInVectAcc>(inInterface.inCascade);
                             acc2 = readCascade<TT_DATA, TT_COEFF>(inInterface, acc2);
                             acc2 = macTdm2(acc2, dataVect, coeffVect);
                         }

diff --git a/dsp/L1/src/aie/matrix_vector_mul.cpp b/dsp/L1/src/aie/matrix_vector_mul.cpp
@@ -98,13 +98,13 @@ kernelMatVecMulClass<TT_DATA_A,
                 inPtrA = (matrixStartPtr) + (frame * loadsPerMatrix) + (idx);
                 inPtrB = (vectorStartPtr) + (frame * loadsPerVectorB);
 
-                if
-                    constexpr(TP_CASC_IN == CASC_IN_TRUE) {
-                        acc = (accVect_t)readincr_v<vecSampleNumA>(inInterface.inCascade);
-                    }
-                else {
+                // if
+                //     constexpr(TP_CASC_IN == CASC_IN_TRUE) {
+                //         acc = (accVect_t)readincr_v<vecSampleNumA>(inInterface.inCascade);
+                //     }
+                // else {
                     acc = (accVect_t)blankVect;
-                }
+                // }
                 for (int vecInB = 0; vecInB < loadsPerVectorB; vecInB++) {
                     dataB = *inPtrB++;
 #pragma unroll(vecSampleNumB)
@@ -118,6 +118,10 @@ kernelMatVecMulClass<TT_DATA_A,
                         }
                     }
                 }
+                if
+                    constexpr(TP_CASC_IN == CASC_IN_TRUE) {
+                        acc = ::aie::add(acc, (dataA_t)readincr_v<vecSampleNumA>(inInterface.inCascade));
+                }
                 // output to outVect or to outCascade
                 if
                     constexpr(TP_CASC_OUT == CASC_OUT_FALSE) {

diff --git a/ultrasound/L1/README.md b/ultrasound/L1/README.md
@@ -1,19 +1,3 @@
-# Copyright (C) 2019-2022, Xilinx, Inc.
-# Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-# vitis makefile-generator v2.0.8
-
 ## Ultrasound Library - Level 1 (L1)
 
 The level 1 of Vitis Ultrasound Library contains the aie kernels. For more details information, please reference to L1 User Guide in the document for usage and design information.
@@ -453,16 +437,20 @@ This kernel create a vector and returns it `LEN` times.
 	- `out`: elements of the result of the operation (matrix) to be passed from the kernel.
 
 ## License
-Copyright 2022 AMD, Inc.
 
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
+Licensed using the [Apache 2.0 license](https://www.apache.org/licenses/LICENSE-2.0).
+
+    Copyright (C) 2019-2022, Xilinx, Inc.
+    Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
 
-    http://www.apache.org/licenses/LICENSE-2.0
+        http://www.apache.org/licenses/LICENSE-2.0
 
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
diff --git a/ultrasound/L2/README.md b/ultrasound/L2/README.md
@@ -117,16 +117,20 @@ This graph is used to compute the chordal version of the Catmull-Rom. It is call
 	- `C`: A vector with the result of the interpolation
 
 ## License
-Copyright 2022 AMD, Inc.
 
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
+Licensed using the [Apache 2.0 license](https://www.apache.org/licenses/LICENSE-2.0).
 
-    http://www.apache.org/licenses/LICENSE-2.0
+    Copyright (C) 2019-2022, Xilinx, Inc.
+    Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
 
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
diff --git a/ultrasound/L2/tests/README.md b/ultrasound/L2/tests/README.md
@@ -3,15 +3,15 @@
 ### Setup Environment
 ```bash
 #!/bin/bash
-# setup vitis_22.2 env
-source <Vitis_install_path>/Vitis/2022.2/settings64.sh
+# setup vitis_24.2 env
+source <Vitis_install_path>/Vitis/2024.2/settings64.sh
 source /opt/xilinx/xrt/setup.sh
 export PLATFORM_REPO_PATHS=<path to platforms>
-export PLATFORM=xilinx_vck190_base_202220_1
+export PLATFORM=xilinx_vck190_base_202420_1
 # set up your SYSROOT, ROOTFS and K_IMAGE PATH
-export SYSROOT=<path to platforms>/sw/versal/xilinx-versal-common-v2022.2/sysroots/aarch64-xilinx-linux/
-export ROOTFS=<path to platforms>/sw/versal/xilinx-versal-common-v2022.2/rootfs.ext4
-export K_IMAGE=<path to platforms>/sw/versal/xilinx-versal-common-v2022.2/Image
+export SYSROOT=<path to platforms>/sw/versal/xilinx-versal-common-v2024.2/sysroots/aarch64-xilinx-linux/
+export ROOTFS=<path to platforms>/sw/versal/xilinx-versal-common-v2024.2/rootfs.ext4
+export K_IMAGE=<path to platforms>/sw/versal/xilinx-versal-common-v2024.2/Image
 ```
 
 ### Run a L2 Example
@@ -27,16 +27,20 @@ make all TARGET=hw       # build the entire program for hw_run
 ```
 
 ## License
-Copyright 2022 AMD, Inc.
 
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
+Licensed using the [Apache 2.0 license](https://www.apache.org/licenses/LICENSE-2.0).
 
-    http://www.apache.org/licenses/LICENSE-2.0
+    Copyright (C) 2019-2022, Xilinx, Inc.
+    Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
 
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
diff --git a/ultrasound/L3/README.md b/ultrasound/L3/README.md
@@ -135,16 +135,20 @@ This beamformer is the one used to compute SA beamformation. As the graph is obt
 	- `C`: A vector with the result of the interpolation
 
 ## License
-Copyright 2022 AMD, Inc.
 
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
+Licensed using the [Apache 2.0 license](https://www.apache.org/licenses/LICENSE-2.0).
 
-    http://www.apache.org/licenses/LICENSE-2.0
+    Copyright (C) 2019-2022, Xilinx, Inc.
+    Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
 
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
diff --git a/ultrasound/L3/tests/README.md b/ultrasound/L3/tests/README.md
@@ -3,15 +3,15 @@
 ### Setup Environment
 ```bash
 #!/bin/bash
-# setup vitis_22.2 env
-source <Vitis_install_path>/Vitis/2022.2/settings64.sh
+# setup vitis_24.2 env
+source <Vitis_install_path>/Vitis/2024.2/settings64.sh
 source /opt/xilinx/xrt/setup.sh
 export PLATFORM_REPO_PATHS=<path to platforms>
-export PLATFORM=xilinx_vck190_base_202220_1
+export PLATFORM=xilinx_vck190_base_202420_1
 # set up your SYSROOT, ROOTFS and K_IMAGE PATH
-export SYSROOT=<path to platforms>/sw/versal/xilinx-versal-common-v2022.2/sysroots/aarch64-xilinx-linux/
-export ROOTFS=<path to platforms>/sw/versal/xilinx-versal-common-v2022.2/rootfs.ext4
-export K_IMAGE=<path to platforms>/sw/versal/xilinx-versal-common-v2022.2/Image
+export SYSROOT=<path to platforms>/sw/versal/xilinx-versal-common-v2024.2/sysroots/aarch64-xilinx-linux/
+export ROOTFS=<path to platforms>/sw/versal/xilinx-versal-common-v2024.2/rootfs.ext4
+export K_IMAGE=<path to platforms>/sw/versal/xilinx-versal-common-v2024.2/Image
 ```
 
 ### Run a L3 Example
@@ -27,16 +27,20 @@ make all TARGET=hw       # build the entire program for hw_run
 ```
 
 ## License
-Copyright 2022 AMD, Inc.
 
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
+Licensed using the [Apache 2.0 license](https://www.apache.org/licenses/LICENSE-2.0).
 
-    http://www.apache.org/licenses/LICENSE-2.0
+    Copyright (C) 2019-2022, Xilinx, Inc.
+    Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
 
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.