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Merge branch 'master' into fix_fpga_ddr_calib
2 parents cdd8f45 + 092d004 commit 2b3223d

9 files changed

Lines changed: 109 additions & 37 deletions

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‎mkapp/ota_app/HDZGOGGLE_RX-76.bin‎

-7.34 KB
Binary file not shown.

‎src/core/app_state.c‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -211,17 +211,21 @@ void app_switch_to_hdzero(bool is_default) {
211211
Display_1080P30(CAM_MODE);
212212
break;
213213

214+
case VR_1080P24:
215+
Display_1080P24(CAM_MODE);
216+
break;
217+
214218
default:
215219
perror("switch_to_video CaM_MODE error");
216220
}
217221

218222
channel_osd_mode = CHANNEL_SHOWTIME;
219223

220-
if (CAM_MODE == VR_1080P30)
224+
if (CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24)
221225
lvgl_switch_to_1080p();
222226
else
223227
lvgl_switch_to_720p();
224-
osd_fhd(CAM_MODE == VR_1080P30);
228+
osd_fhd(CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24);
225229
osd_clear();
226230
osd_show(true);
227231
lv_timer_handler();

‎src/core/dvr.c‎

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -114,6 +114,11 @@ void dvr_update_vi_conf(video_resolution_t fmt) {
114114
ini_putl("vi", "height", 1080, REC_CONF);
115115
ini_putl("vi", "fps", 30, REC_CONF);
116116
break;
117+
case VR_1080P24:
118+
ini_putl("vi", "width", 1920, REC_CONF);
119+
ini_putl("vi", "height", 1080, REC_CONF);
120+
ini_putl("vi", "fps", 50, REC_CONF);
121+
break;
117122
case VR_1080P50:
118123
ini_putl("vi", "width", 1920, REC_CONF);
119124
ini_putl("vi", "height", 1080, REC_CONF);
@@ -167,7 +172,7 @@ static void dvr_update_record_conf() {
167172

168173
if (g_source_info.source == SOURCE_HDZERO) {
169174
LOGI("CAM_MODE=%d", CAM_MODE);
170-
if (CAM_MODE == VR_1080P30) {
175+
if (CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24) {
171176
ini_putl("venc", "width", 1920, REC_CONF);
172177
ini_putl("venc", "height", 1080, REC_CONF);
173178
} else {
@@ -179,6 +184,10 @@ static void dvr_update_record_conf() {
179184
ini_putl("venc", "fps", 60, REC_CONF);
180185
ini_putl("venc", "kbps", 34000, REC_CONF);
181186
ini_putl("venc", "h265", 0, REC_CONF);
187+
} else if (CAM_MODE == VR_1080P24) {
188+
ini_putl("venc", "fps", 50, REC_CONF);
189+
ini_putl("venc", "kbps", 34000, REC_CONF);
190+
ini_putl("venc", "h265", 0, REC_CONF);
182191
} else if (CAM_MODE == VR_540P90 || CAM_MODE == VR_540P90_CROP) { // 90fps
183192
ini_putl("venc", "fps", 90, REC_CONF);
184193
ini_putl("venc", "kbps", 34000, REC_CONF);

‎src/core/msp_displayport.c‎

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,7 @@ void recive_one_frame(uint8_t *uart_buf, uint8_t uart_buf_len) {
180180
break;
181181

182182
} // switch(rx_state)
183-
} // while(RS_ready1())
183+
} // while(RS_ready1())
184184
}
185185

186186
void parser_rx(uint8_t function, uint8_t index, uint8_t *rx_buf) {
@@ -235,12 +235,21 @@ void camTypeDetect(uint8_t rData) {
235235
last_cam = cur_cam;
236236
cur_cam = VR_1080P30;
237237
break;
238+
239+
case 0xBB:
240+
last_cam = cur_cam;
241+
cur_cam = VR_1080P24;
242+
break;
238243
}
244+
239245
if (cur_cam == last_cam)
240246
CAM_MODE = cur_cam;
241247
else if (cur_cam == VR_1080P30 || last_cam == VR_1080P30) {
242248
// LOGI("Cam_mode changed:%d", cur_cam);
243249
load_fc_osd_font(cur_cam == VR_1080P30);
250+
} else if (cur_cam == VR_1080P24 || last_cam == VR_1080P24) {
251+
// LOGI("Cam_mode changed:%d", cur_cam);
252+
load_fc_osd_font(cur_cam == VR_1080P24);
244253
}
245254
}
246255

@@ -256,7 +265,7 @@ void fcTypeDetect(uint8_t *rData) {
256265
fc_variant[i] = fc_variant_rcv[i];
257266

258267
// LOGI("fc_variant changed:%s", fc_variant_rcv);
259-
load_fc_osd_font(cur_cam == VR_1080P30);
268+
load_fc_osd_font(cur_cam == VR_1080P30 || cur_cam == VR_1080P24);
260269
}
261270
}
262271

‎src/core/msp_displayport.h‎

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -26,15 +26,17 @@ typedef enum {
2626

2727
typedef enum {
2828
VR_720P50 = 0,
29-
VR_720P60 = 1,
30-
VR_720P30 = 2,
31-
VR_540P90 = 3,
32-
VR_540P60 = 4,
33-
VR_960x720P60 = 5,
34-
VR_540P90_CROP = 6,
35-
VR_1080P30 = 7,
36-
VR_1080P50 = 8,
37-
VR_1080P60 = 9,
29+
VR_720P60,
30+
VR_720P30,
31+
VR_540P90,
32+
VR_540P60,
33+
VR_960x720P60,
34+
VR_540P90_CROP,
35+
VR_1080P30,
36+
VR_1080P24,
37+
//
38+
VR_1080P50,
39+
VR_1080P60,
3840
} video_resolution_t;
3941

4042
typedef enum {

‎src/core/self_test.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ void self_test() {
7272
LOGI("%sTP2825 ver = 0x%x ", msg[i == 0x11], i);
7373
} else {
7474
i = I2C_Read(ADDR_TP2825, 0x0B);
75-
LOGI("%sTW9900 ver = 0x%x ", msg[i == 0xD0], i);
75+
LOGI("%sTP2825 ver = 0x%x ", msg[i == 0xD0], i);
7676
}
7777
TP2825_close();
7878

@@ -97,4 +97,4 @@ void self_test() {
9797
}
9898

9999
LOGI("==== Log ======================");
100-
}
100+
}

‎src/driver/hardware.c‎

Lines changed: 67 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -82,19 +82,19 @@ uint32_t pclk_phase_default[2][VIDEO_SOURCE_NUM] = {
8282
},
8383
{
8484
// GOGGLE_VER_2
85-
0x00000001,
85+
0x00000004,
8686
0x00000004, // VIDEO_SOURCE_MENU_UI
87-
0x00000000, // VIDEO_SOURCE_HDZERO_IN_720P60_50
88-
0x00000000, // VIDEO_SOURCE_HDZERO_IN_720P90
89-
0x00000000, // VIDEO_SOURCE_HDZERO_IN_1080P30
90-
0x00000000, // VIDEO_SOURCE_AV_IN
91-
0x00000000, // VIDEO_SOURCE_HDMI_IN_1080P50
92-
0x00000000, // VIDEO_SOURCE_HDMI_IN_1080P60
93-
0x00000000, // VIDEO_SOURCE_HDMI_IN_1080POTHER
94-
0x00000000, // VIDEO_SOURCE_HDMI_IN_720P50
95-
0x00000000, // VIDEO_SOURCE_HDMI_IN_720P60
96-
0x00000000, // VIDEO_SOURCE_HDMI_IN_720P100
97-
0x00000000, // VIDEO_SOURCE_TP2825_EX, DO NOT USE
87+
0x00000004, // VIDEO_SOURCE_HDZERO_IN_720P60_50
88+
0x00000004, // VIDEO_SOURCE_HDZERO_IN_720P90
89+
0x00000004, // VIDEO_SOURCE_HDZERO_IN_1080P30
90+
0x00000004, // VIDEO_SOURCE_AV_IN
91+
0x00000004, // VIDEO_SOURCE_HDMI_IN_1080P50
92+
0x00000004, // VIDEO_SOURCE_HDMI_IN_1080P60
93+
0x00000004, // VIDEO_SOURCE_HDMI_IN_1080POTHER
94+
0x00000004, // VIDEO_SOURCE_HDMI_IN_720P50
95+
0x00000004, // VIDEO_SOURCE_HDMI_IN_720P60
96+
0x00000004, // VIDEO_SOURCE_HDMI_IN_720P100
97+
0x00000004, // VIDEO_SOURCE_TP2825_EX, DO NOT USE
9898
},
9999
};
100100

@@ -536,13 +536,21 @@ void csic_pclk_invert_set(uint8_t is_invert) {
536536
void pclk_phase_set(video_source_t source) {
537537
LOGI("pclk_phase_set %d", pclk_phase[source]);
538538
// bit[0] hdmi in
539-
IT66021_Set_Pclk((pclk_phase[source] >> 0) & 1);
539+
if (source == VIDEO_SOURCE_HDMI_IN_1080P50 || source == VIDEO_SOURCE_HDMI_IN_1080P60 || source == VIDEO_SOURCE_HDMI_IN_1080POTHER) {
540+
IT66021_Set_Pclk((pclk_phase[source] >> 0) & 1);
541+
} else {
542+
IT66021_Set_Pclk((pclk_phase[source] >> 0) & 1);
543+
}
540544

541545
// bit[1] analog in
542546
TP2825_Set_Pclk((pclk_phase[source] >> 1) & 1);
543547

544548
// bit[2] osd
545-
vdpo_sync_ctrl_set((pclk_phase[source] >> 2) & 1, 0, 0);
549+
if (source == VIDEO_SOURCE_AV_IN) {
550+
vdpo_sync_ctrl_set((pclk_phase[source] >> 2) & 1, 1, 0);
551+
} else {
552+
vdpo_sync_ctrl_set((pclk_phase[source] >> 2) & 1, 0, 0);
553+
}
546554

547555
// bit[3] dvr
548556
csic_pclk_invert_set((pclk_phase[source] >> 3) & 1);
@@ -711,6 +719,37 @@ void Display_1080P30_t(int mode) {
711719
system_exec("aww 0x06542018 0x00000044"); // disable horizontal chroma FIR filter.
712720
}
713721

722+
void Display_1080P24_t(int mode) {
723+
OLED_display(0);
724+
I2C_Write(ADDR_FPGA, 0x8C, 0x00);
725+
726+
system_exec("dispw -s vdpo 1080p60");
727+
g_hw_stat.vdpo_tmg = VDPO_TMG_1080P60;
728+
vclk_phase_set(VIDEO_SOURCE_HDZERO_IN_1080P30, 0);
729+
pclk_phase_set(VIDEO_SOURCE_HDZERO_IN_1080P30);
730+
731+
I2C_Write(ADDR_FPGA, 0x80, 0x84);
732+
// I2C_Write(ADDR_FPGA, 0x84, 0x00); // close OSD
733+
734+
DM5680_SetFPS(mode);
735+
MFPGA_Set1080P30();
736+
737+
if (GOGGLE_VER_2 == 0)
738+
OLED_SetTMG(2);
739+
else
740+
OLED_SetTMG(0);
741+
742+
if (GOGGLE_VER_2)
743+
I2C_Write(ADDR_FPGA, 0xa7, 0x00);
744+
745+
I2C_Write(ADDR_FPGA, 0x8C, 0x01);
746+
747+
g_hw_stat.source_mode = SOURCE_MODE_HDZERO;
748+
Display_VO_SWITCH(1);
749+
OLED_display(1);
750+
system_exec("aww 0x06542018 0x00000044"); // disable horizontal chroma FIR filter.
751+
}
752+
714753
void Display_720P60_50(int mode, uint8_t is_43) {
715754
pthread_mutex_lock(&hardware_mutex);
716755
Display_720P60_50_t(mode, is_43);
@@ -723,6 +762,12 @@ void Display_720P90(int mode) {
723762
pthread_mutex_unlock(&hardware_mutex);
724763
}
725764

765+
void Display_1080P24(int mode) {
766+
pthread_mutex_lock(&hardware_mutex);
767+
Display_1080P24_t(mode);
768+
pthread_mutex_unlock(&hardware_mutex);
769+
}
770+
726771
void Display_1080P30(int mode) {
727772
pthread_mutex_lock(&hardware_mutex);
728773
Display_1080P30_t(mode);
@@ -782,16 +827,18 @@ int HDZERO_detect() // return = 1: vtmg to V536 changed
782827
break;
783828
case VR_1080P30:
784829
Display_1080P30_t(CAM_MODE);
785-
830+
break;
831+
case VR_1080P24:
832+
Display_1080P24_t(CAM_MODE);
786833
break;
787834
default:
788835
LOGW("cam_mode =%d not suppored!!\n ", CAM_MODE);
789836
break;
790837
}
791838

792-
if (CAM_MODE == VR_1080P30)
839+
if (CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24)
793840
fhd_req = 1;
794-
else if (cam_mode_last == VR_1080P30)
841+
else if (cam_mode_last == VR_1080P30 || cam_mode_last == VR_1080P24)
795842
fhd_req = -1;
796843
dvr_update_vi_conf(CAM_MODE);
797844
system_script(REC_STOP_LIVE);
@@ -825,6 +872,7 @@ void AV_Mode_Switch_fpga(int is_pal) {
825872
}
826873
I2C_Write(ADDR_FPGA, 0x06, 0x0F);
827874
system_exec("aww 0x06542018 0x00000044"); // disable horizontal chroma FIR filter.
875+
vdpo_sync_ctrl_set((pclk_phase[VIDEO_SOURCE_AV_IN] >> 2) & 1, 1, 0);
828876
}
829877

830878
void AV_Mode_Switch(int is_pal) {
@@ -937,8 +985,9 @@ int AV_in_detect() // return = 1: vtmg to V536 changed
937985
g_hw_stat.av_pal_w = g_hw_stat.av_pal_w ? 0 : 1;
938986

939987
TP2825_Switch_Mode(g_hw_stat.av_pal_w);
940-
if (GOGGLE_VER_2)
988+
if (GOGGLE_VER_2) {
941989
AV_Mode_Switch(g_hw_stat.av_pal_w);
990+
}
942991
// LOGI("Switch mode:%d", g_hw_stat.av_pal_w);
943992

944993
if (g_hw_stat.av_pal_w)

‎src/driver/hardware.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,7 @@ void Display_UI();
9292
void Display_720P90(int mode);
9393
void Display_720P60_50(int mode, uint8_t is_43);
9494
void Display_1080P30(int mode);
95+
void Display_1080P24(int mode);
9596

9697
void Display_Osd(bool enable);
9798

‎src/driver/rtc6715.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,6 @@
1919

2020
int rtc6715_rssi = 0;
2121

22-
static uint8_t RTC6715_rssi;
23-
2422
void MM_Write(uint8_t addr, uint32_t dat) {
2523
uint8_t val;
2624

@@ -97,4 +95,4 @@ void *thread_rtc6715_rssi(void *ptr) {
9795
}
9896
usleep(100 * 1000);
9997
}
100-
}
98+
}

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