This project contains source code which implements and tests a MIPS32 single-
cycle processor.

Directory Contents:

  display_modules:
    - Seven Segment decoder for hexadecimal values to their SSD counterparts.
    - Tera Terminal translator (translates 32-bit values to ASCII equivalents for output to terminal windows at 38400 baud)
  
  mips_components:
    - Fetch module
    - Decode module
    - Execute module
    - Memory and Control modules available upon request (they were done by another person)