Update cache configuration terminology from “lines” to “sets”#429
Merged
mortbopet merged 3 commits intomortbopet:masterfrom Jan 14, 2026
Merged
Update cache configuration terminology from “lines” to “sets”#429mortbopet merged 3 commits intomortbopet:masterfrom
mortbopet merged 3 commits intomortbopet:masterfrom
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Summary
This PR aligns Ripes cache terminology with standard cache organization vocabulary by renaming configuration and documentation references that previously used “lines” where “sets” is the precise term (especially for set-associative caches). It also makes the “Words/Line” label clearer by changing it to “Words per Line”.
References
Wikipedia – Cache placement policies
Defines set-associative cache as a cache “divided into n sets and each set contains m cache lines” and explains that the set is determined by the index bits in the address.
https://en.wikipedia.org/wiki/Cache_placement_policies
Wikipedia – CPU cache
Explains cache associativity, including N-way set-associative caches where each memory location may be cached in N locations, and describes how the memory address is split into tag, index, and block offset, with the index specifying the cache set.
https://en.wikipedia.org/wiki/CPU_cache
ScienceDirect Topics – Set-Associative Cache
An authoritative engineering reference stating that a set-associative cache is organized as an array of sets (each set containing multiple cache lines/ways) and that the set index selects the set, with tag and block offset used to identify the specific line and word.
https://www.sciencedirect.com/topics/computer-science/set-associative-cache
UCSD CSE141 Cache Handout (university teaching material)
Defines cache terminology including cache set (a row in the cache indexed by the set index bits) and explains the address decomposition into offset, set index, and tag used to locate data in a set.
https://cseweb.ucsd.edu/classes/su07/cse141/cache-handout.pdf