This repository implements a 1-bit reversible Quantum Arithmetic Logic Unit (ALU) using Qiskit, designed with modular quantum circuits and executed on simulators and real IBM Quantum hardware.
The project demonstrates how classical ALU functionality can be mapped to unitary, reversible quantum logic, respecting quantum constraints such as no-cloning and reversibility.
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Supports OR, AND, XOR, and ADD operations
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Opcode-controlled operation selection
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Custom reversible 4×1 quantum multiplexer
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Explicit ancilla management and uncomputation
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Fully unitary ALU core
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Verified using a complete truth table
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Executed on:
- Qiskit Aer simulator
- IBM Fake backend
- Real IBM Quantum hardware
a,b– data inputscin– carry-in (used only for ADD)op[1:0]– opcode bits
out– ALU resultcarry– carry-out (meaningful only for ADD)
| op[1] | op[0] | Operation |
|---|---|---|
| 0 | 0 | OR |
| 0 | 1 | AND |
| 1 | 0 | XOR |
| 1 | 1 | ADD |
The carry output is generated by the full adder and is only meaningful for the ADD operation. For logical operations, it is intentionally ignored.
All operations were validated against their classical truth tables.
For non-ADD operations, cin is ignored and carry = 0.
| a | b | cin | out | carry |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
All simulation and hardware results match the expected outputs.
quantum-reversible-alu/
├── gates/
│ ├── and_gate.py
│ ├── or_gate.py
│ ├── xor_gate.py
│ ├── full_adder.py
│ └── mux_4_x_1.py
├── alu.py # ALU construction (pure quantum logic)
├── run_circuit.py # Backend execution helpers
├── alu.ipynb # Entry-point demonstration notebook
├── requirements.txt
└── README.md
pip install -r requirements.txtOpen and run:
alu.ipynb
The notebook demonstrates:
- Input initialization
- Opcode selection
- Measurement of
outandcarry - Execution on simulators and IBM Quantum backends
Measurements are applied only at the top level to read the ALU result and carry-out. Intermediate qubits and ancilla are not measured to preserve reversibility and modularity.
This project illustrates how a classical ALU can be redesigned using reversible quantum logic, highlighting key architectural differences between classical and quantum computation. The design emphasizes modularity, correctness, and hardware-awareness over circuit depth optimization.
✔ Design complete ✔ Fully validated ✔ Executed on real quantum hardware
This implementation represents a finished and verified reference design.
MIT License