Pr 43 build a complete qick testbench to run simulations

[mmdiego]

Refactored qick_testbench to wrap main modules into qick_dut, and also reorganized the testbench in separate files for stimuli and tasks definitions. No big changes in functionalities.

[Copilot]

Pull request overview

This PR refactors the QICK firmware simulation testbench by wrapping major modules into a new qick_dut wrapper and splitting the testbench logic into separate include files for stimuli and reusable tasks, alongside adding a simple DAC/ADC frontend model for simulations.

Changes:

• Introduce qick_dut wrapper module and update tb_qick.sv to instantiate it.
• Split testbench logic into tb_qick_stimuli.svh and tb_qick_tasks.svh.
• Update the Vivado testbench project to include new sources; add/remove notebooks and bump library version.

Reviewed changes

Copilot reviewed 10 out of 14 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
qick_lib/qick/VERSION	Bumps QICK library version.
firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb	Removes an older testbench notebook.
firmware/testbench/qick_testbench/src/tb/tb_qick_tasks.svh	Adds reusable tasks (AXI access, memory loading, readout config).
firmware/testbench/qick_testbench/src/tb/tb_qick_stimuli.svh	Adds consolidated simulation stimulus/control flow.
firmware/testbench/qick_testbench/src/tb/tb_qick.sv	Refactors top-level TB to use qick_dut and include stimuli/tasks.
firmware/testbench/qick_testbench/src/tb/qick_dut.sv	New DUT wrapper encapsulating AXI VIP + SG + readout blocks.
firmware/testbench/qick_testbench/src/tb/model_DAC_ADC.sv	New DAC/ADC frontend behavioral model for simulation.
firmware/testbench/qick_testbench/qick_testbench.xpr	Adds new sources to Vivado project and updates run metadata.
firmware/notebooks/qick_rb/RB_tProc_v1_experiment.ipynb	Adds an RB experiment notebook for tProc v1.
firmware/hdl/fifo_dc_axi_xpm.sv	Minor syntax cleanup (endmodule).

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[meeg]

@mmdiego can you resolve the Copilot review comments?

[mmdiego]

@mmdiego can you resolve the Copilot review comments?

Yes, I've reviewed them but none of it was critical. I'll comment on them though and resolve any if necessary. I'll do it in the next days

[Copilot]

Pull request overview

This PR refactors the QICK firmware simulation testbench by introducing a qick_dut wrapper module and splitting testbench logic into separate stimuli/task include files, while also updating ancillary notebooks and versioning.

Changes:

• Refactor testbench top (tb_qick.sv) to instantiate a new qick_dut wrapper and include separated tb_qick_stimuli.svh / tb_qick_tasks.svh.
• Add simulation-only modules/files (qick_dut.sv, model_DAC_ADC.sv) and update the Vivado project (.xpr) accordingly.
• Add/remove notebooks related to randomized benchmarking and bump library version.

Reviewed changes

Copilot reviewed 11 out of 15 changed files in this pull request and generated 2 comments.

Show a summary per file

File	Description
qick_lib/qick/qick_asm.py	Extends dump_cfg with optional file output.
qick_lib/qick/VERSION	Bumps QICK Python package version.
firmware/testbench/testbench_notebooks/test03_random_benchmarking.ipynb	Removes an older RB-related testbench notebook.
firmware/testbench/qick_testbench/src/tb/tb_qick_tasks.svh	Adds reusable SV tasks for AXI access, memory loading, and readout config.
firmware/testbench/qick_testbench/src/tb/tb_qick_stimuli.svh	Adds testbench stimuli/control flow split out from tb_qick.sv.
firmware/testbench/qick_testbench/src/tb/tb_qick.sv	Refactors TB top to use qick_dut and new include files; updates DDS constants.
firmware/testbench/qick_testbench/src/tb/qick_dut.sv	Adds DUT wrapper encapsulating processor + SG + readout pipeline + AXI VIP masters.
firmware/testbench/qick_testbench/src/tb/model_DAC_ADC.sv	Extracts DAC/ADC RF front-end model into its own simulation module.
firmware/testbench/qick_testbench/qick_testbench.xpr	Updates Vivado project sources/flags for the refactored simulation TB.
firmware/notebooks/qick_rb/RB_tProc_v1_experiment.ipynb	Adds a tProc v1 RB experiment notebook.
firmware/hdl/fifo_dc_axi_xpm.sv	Minor formatting change to endmodule.

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[mmdiego]

@meeg Done