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Use 16-channel virtual mux on Cosmo #2154

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Merged
merged 3 commits into from
Jul 22, 2025
Merged

Use 16-channel virtual mux on Cosmo #2154

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9e90ccf
Use 16-channel virtual mux on Cosmo
mkeeter Jul 15, 2025
91a3fa3
Fix mux segment mapping
mkeeter Jul 17, 2025
4395701
Update images with oximux16
nathanaelhuffman Jul 21, 2025
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207 changes: 73 additions & 134 deletions app/cosmo/base.toml
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4 changes: 2 additions & 2 deletions drv/cosmo-seq-server/cosmo-hp/README.md
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Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
FPGA images and collateral are generated from:
[this sha](https://github.com/oxidecomputer/quartz/commit/ac70329388b36815bc405b58b5260a060bbfa953)
[release](https://api.github.com/repos/oxidecomputer/quartz/releases/226010645)
[this sha](https://github.com/oxidecomputer/quartz/commit/0d094c19ea381fdf4aa8f0b0fc7e5f2a33a37506)
[release](https://api.github.com/repos/oxidecomputer/quartz/releases/234047862)
Binary file modified drv/cosmo-seq-server/cosmo-hp/cosmo_hp.bz2
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8 changes: 8 additions & 0 deletions drv/i2c-types/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -224,4 +224,12 @@ pub enum Segment {
S6 = 6,
S7 = 7,
S8 = 8,
S9 = 9,
S10 = 10,
S11 = 11,
S12 = 12,
S13 = 13,
S14 = 14,
S15 = 15,
S16 = 16,
}
4 changes: 2 additions & 2 deletions drv/spartan7-loader/cosmo-seq/README.md
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Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
FPGA images and collateral are generated from:
[this sha](https://github.com/oxidecomputer/quartz/commit/1c58def4fc932e2f42f74573494678a056925da9)
[release](https://api.github.com/repos/oxidecomputer/quartz/releases/231238503)
[this sha](https://github.com/oxidecomputer/quartz/commit/0d094c19ea381fdf4aa8f0b0fc7e5f2a33a37506)
[release](https://api.github.com/repos/oxidecomputer/quartz/releases/234047771)
Binary file modified drv/spartan7-loader/cosmo-seq/cosmo_seq.bz2
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2 changes: 1 addition & 1 deletion drv/spartan7-loader/cosmo-seq/cosmo_seq_top.json
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Expand Up @@ -31,7 +31,7 @@
},
{
"type": "addrmap",
"addr_span_bytes": 84,
"addr_span_bytes": 88,
"inst_name": "sequencer",
"orig_type_name": "sequencer_regs",
"addr_offset": 768,
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48 changes: 48 additions & 0 deletions drv/spartan7-loader/cosmo-seq/debug_regs.json
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Expand Up @@ -324,6 +324,18 @@
{
"name": "t6_sequencer",
"value": 11
},
{
"name": "mux1_sel",
"value": 12
},
{
"name": "mux2_sel",
"value": 13
},
{
"name": "mux3_sel",
"value": 14
}
]
},
Expand Down Expand Up @@ -385,6 +397,18 @@
{
"name": "t6_sequencer",
"value": 11
},
{
"name": "mux1_sel",
"value": 12
},
{
"name": "mux2_sel",
"value": 13
},
{
"name": "mux3_sel",
"value": 14
}
]
},
Expand Down Expand Up @@ -446,6 +470,18 @@
{
"name": "t6_sequencer",
"value": 11
},
{
"name": "mux1_sel",
"value": 12
},
{
"name": "mux2_sel",
"value": 13
},
{
"name": "mux3_sel",
"value": 14
}
]
},
Expand Down Expand Up @@ -507,6 +543,18 @@
{
"name": "t6_sequencer",
"value": 11
},
{
"name": "mux1_sel",
"value": 12
},
{
"name": "mux2_sel",
"value": 13
},
{
"name": "mux3_sel",
"value": 14
}
]
}
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51 changes: 41 additions & 10 deletions drv/spartan7-loader/cosmo-seq/sequencer_regs.json
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@@ -1,6 +1,6 @@
{
"type": "addrmap",
"addr_span_bytes": 84,
"addr_span_bytes": 88,
"inst_name": "sequencer_regs",
"addr_offset": 0,
"children": [
Expand Down Expand Up @@ -559,10 +559,30 @@
},
{
"type": "reg",
"inst_name": "rail_enables",
"inst_name": "amd_pwgdout_fedges",
"addr_offset": 48,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
{
"type": "field",
"inst_name": "counts",
"lsb": 0,
"msb": 7,
"reset": 0,
"sw_access": "rw",
"se_onread": null,
"se_onwrite": "wclr",
"desc": "Falling edge counter of AMD's PowerGDOUT output while in A0/A0HP. Saturates at 255. Cleared by any write or starting a new power up"
}
]
},
{
"type": "reg",
"inst_name": "rail_enables",
"addr_offset": 52,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
{
"type": "field",
Expand Down Expand Up @@ -767,7 +787,7 @@
{
"type": "reg",
"inst_name": "rail_pgs",
"addr_offset": 52,
"addr_offset": 56,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -974,7 +994,7 @@
{
"type": "reg",
"inst_name": "rail_pgs_max_hold",
"addr_offset": 56,
"addr_offset": 60,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -1181,7 +1201,7 @@
{
"type": "reg",
"inst_name": "sp5_readbacks",
"addr_offset": 60,
"addr_offset": 64,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -1283,13 +1303,24 @@
"se_onread": null,
"se_onwrite": null,
"desc": "pwr_btn_l live status, (From FPGA to SP5)"
},
{
"type": "field",
"inst_name": "pwrgd_out",
"lsb": 9,
"msb": 9,
"reset": null,
"sw_access": "r",
"se_onread": null,
"se_onwrite": null,
"desc": "pwrgd_out live status, (From SP5 to FPGA)"
}
]
},
{
"type": "reg",
"inst_name": "nic_readbacks",
"addr_offset": 64,
"addr_offset": 68,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -1397,7 +1428,7 @@
{
"type": "reg",
"inst_name": "debug_enables",
"addr_offset": 68,
"addr_offset": 72,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -1450,7 +1481,7 @@
{
"type": "reg",
"inst_name": "nic_overrides",
"addr_offset": 72,
"addr_offset": 76,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -1536,7 +1567,7 @@
{
"type": "reg",
"inst_name": "ignition_control",
"addr_offset": 76,
"addr_offset": 80,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down Expand Up @@ -1567,7 +1598,7 @@
{
"type": "reg",
"inst_name": "pcie_clk_ctrl",
"addr_offset": 80,
"addr_offset": 84,
"regwidth": 32,
"min_accesswidth": 32,
"children": [
Expand Down
1 change: 1 addition & 0 deletions drv/stm32xx-i2c/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ pub type Isr = device::i2c1::isr::R;

pub mod ltc4306;
pub mod max7358;
pub mod oximux16;
pub mod pca9545;
pub mod pca9548;

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3 changes: 3 additions & 0 deletions drv/stm32xx-i2c/src/max7358.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -227,6 +227,9 @@ impl I2cMuxDriver for Max7358 {
Segment::S8 => {
reg.set_channel7_selected(true);
}
_ => {
return Err(ResponseCode::SegmentNotFound);
}
}
}

Expand Down
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