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7 changes: 6 additions & 1 deletion src/hotspot/cpu/riscv64/c1_LIRAssembler_riscv64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1334,7 +1334,12 @@ void LIR_Assembler::comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Op
}
}

void LIR_Assembler::align_call(LIR_Code code) { }
void LIR_Assembler::align_call(LIR_Code code) {
// C-Ext: With C-Ext a call may get 2-byte aligned.
// the address of jal itself (which will be patched later) should not span the cache line.
// See CallDynamicJavaDirectNode::compute_padding() for more info.
__ align(4);
}

void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) {
address call = __ trampoline_call(Address(op->addr(), rtype));
Expand Down
7 changes: 5 additions & 2 deletions src/hotspot/cpu/riscv64/macroAssembler_riscv64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2762,7 +2762,7 @@ void MacroAssembler::far_call(Address entry, CodeBuffer *cbuf, Register tmp) {
jalr_nc(x1, tmp, offset); // link
} else {
if (cbuf != NULL) { cbuf->set_insts_mark(); }
jal(entry); // link
jal_nc(entry); // link
}
}

Expand Down Expand Up @@ -3193,7 +3193,9 @@ address MacroAssembler::emit_trampoline_stub(int insts_call_instruction_offset,

// make sure 4 byte aligned here, so that the destination address would be
// 8 byte aligned after 3 intructions
while (offset() % wordSize == 0) { nop(); }
// C-Ext: when we reach here we may get a 2-byte alignment and
// nop() will be 2 bytes in length.
while (offset() % wordSize != 4) { nop(); }

relocate(trampoline_stub_Relocation::spec(code()->insts()->start() +
insts_call_instruction_offset));
Expand All @@ -3208,6 +3210,7 @@ address MacroAssembler::emit_trampoline_stub(int insts_call_instruction_offset,
bind(target);
assert(offset() - stub_start_offset == NativeCallTrampolineStub::data_offset,
"should be");
assert(offset() % wordSize == 0, "address loaded by ld must be 8-byte aligned under riscv64");
emit_int64((intptr_t)dest);

const address stub_start_addr = addr_at(stub_start_offset);
Expand Down
37 changes: 37 additions & 0 deletions src/hotspot/cpu/riscv64/riscv64.ad
Original file line number Diff line number Diff line change
Expand Up @@ -1208,6 +1208,41 @@ int MachCallNativeNode::ret_addr_offset() {
return -1;
}

// C-Ext: With C-Ext a call may get 2-byte aligned.
// The offset encoding in jal ranges bits [12, 31], which could span the cache line.
// Patching this unaligned address will make the write operation not atomic.
// Other threads may be running the same piece of code at full speed, causing concurrency issues.
// So we must ensure that it does not span a cache line so that it can be patched.
int CallStaticJavaDirectNode::compute_padding(int current_offset) const
{
// to make sure the address of jal 4-byte aligned.
return align_up(current_offset, alignment_required()) - current_offset;
}

// C-Ext: With C-Ext a call may get 2-byte aligned.
// The offset encoding in jal ranges bits [12, 31], which could span the cache line.
// Patching this unaligned address will make the write operation not atomic.
// Other threads may be running the same piece of code at full speed, causing concurrency issues.
// So we must ensure that it does not span a cache line so that it can be patched.
int CallDynamicJavaDirectNode::compute_padding(int current_offset) const
{
// skip the movptr in MacroAssembler::ic_call():
// lui + addi + slli(C) + addi + slli(C) + addi
// Though movptr() has already 4-byte aligned with or without C-Ext,
// We need to prevent from further changes by explicitly calculating the size.
const int instruction_size = NativeInstruction::instruction_size;
const int compressed_instruction_size = (!UseCExt ? instruction_size : NativeInstruction::compressed_instruction_size);
const int movptr_size =
2 * instruction_size +
1 * compressed_instruction_size +
1 * instruction_size +
1 * compressed_instruction_size +
1 * instruction_size;
current_offset += movptr_size;
// to make sure the address of jal 4-byte aligned.
return align_up(current_offset, alignment_required()) - current_offset;
}

//=============================================================================

#ifndef PRODUCT
Expand Down Expand Up @@ -9760,6 +9795,7 @@ instruct CallStaticJavaDirect(method meth)
riscv64_enc_call_epilog );

ins_pipe(pipe_class_call);
ins_alignment(4);
%}

// TO HERE
Expand All @@ -9779,6 +9815,7 @@ instruct CallDynamicJavaDirect(method meth, iRegL_R6 cr)
riscv64_enc_call_epilog );

ins_pipe(pipe_class_call);
ins_alignment(4);
%}

// Call Runtime Instruction
Expand Down