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elfloader: add support for PSCI functions via HVC #239
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| help="QEMU CPU", default="@QEMU_SIM_CPU@") | ||
| parser.add_argument('-o', '--cpu-opt', dest='qemu_sim_cpu_opt', type=str, | ||
| help="QEMU CPU Options", default="@QEMU_SIM_CPU_OPT@") | ||
| parser.add_argument('--smp', dest='qemu_sim_smp', type=str, |
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All the other main arguments have a single letter variant, -s is already taken though so I didn't know what to put here.
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Maybe -j, like make does?
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I should investigate into HVC on 32-bit ARM.
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Seems to be the same as for 64-bit Arm.
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I initially tried that but it failed for 32-bit ARM on QEMU. Will have to debug.
| set(sim_cpu_opt "") | ||
| set(sim_machine "") | ||
| set(qemu_sim_extra_args "") | ||
| set(sim_smp "${KernelMaxNumNodes}") |
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This will apply to all simulation targets, but I have only tested ARM.
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If the Qemu argument is the same, it should work. If not, we're not worse off than before.
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It is the same across all architectures so yes it should be fine.
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Considering you want to turn on a real CPU core, I don't see why you would need to use a HVC call instead of a SMC call for that. HCV is to call to a hypervisor running in EL2, SMC is to call into EL3. So except if for some reason SMC just fails and HVC is redirected to EL3, I don't see how using HVC can work while SMC doesn't. Is this some Qemu quirk or am I missing something? |
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Yeah, I think this might be a weird QEMU quirk. But given how little was needed to fix it... However there are a few (but not many) boards with device trees that specify that they want HVC calls for PSCI, e.g. https://elixir.bootlin.com/linux/v6.17.4/source/arch/arm64/boot/dts/qcom/msm8994.dtsi#L178. So it's not unreasonable for the device tree to ask for this... |
I don't know why just doing an I do not know why QEMU has this restriction, I am yet to look into it. |
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Perhaps this clears things up: |
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This is ready for review now. I have added more details in the commit message for the motivation and why this is needed in the first place. I attempted to get 32-bit ARM working but ran into two problems:
This is the log I got: I don't know if I have time to debug the 32-bit ARM case, I can type up more details and post it in an issue. Is it possible to get this merged without 32-bit support? |
The motivation for this change is that currently if the elfloader is trying to boot multiple CPUs for an SMP configuration of seL4, it will fail unless the PSCI method is SVC. The only other possible PSCI method that is possible is HVC, which can occur when the system is being virtualised by something like QEMU and is executing at EL1. For QEMU, unless it is running with virtualisation explicitly enabled (`virtualization=on`), it will default to accepting only the HVC PSCI method. More details are available in comments in the QEMU source [1]. My understanding is the HVC ABI is the exact same as the SMC one, it's just a difference with exception levels. [1]: https://github.com/qemu/qemu/blob/88b1716a407459c8189473e4667653cb8e4c3df7/hw/arm/virt.c#L2265-L2281. Signed-off-by: Ivan Velickovic <[email protected]>
Signed-off-by: Ivan Velickovic <[email protected]>
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I would prefer working arm32 support, but otherwise looks fine.
| help="QEMU CPU", default="@QEMU_SIM_CPU@") | ||
| parser.add_argument('-o', '--cpu-opt', dest='qemu_sim_cpu_opt', type=str, | ||
| help="QEMU CPU Options", default="@QEMU_SIM_CPU_OPT@") | ||
| parser.add_argument('--smp', dest='qemu_sim_smp', type=str, |
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Maybe -j, like make does?
| set(sim_cpu_opt "") | ||
| set(sim_machine "") | ||
| set(qemu_sim_extra_args "") | ||
| set(sim_smp "${KernelMaxNumNodes}") |
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If the Qemu argument is the same, it should work. If not, we're not worse off than before.
That doesn't make any sense, is this another Qemu quirk? Please just add the 32-bit support and ignore the problem for now (so no FID work-arounds either). Maybe add a printf that it seems broken on Qemu, but trying anyway. |
I was looking at this PSCI specification (DEN0022F.b_Power_State_Coordination_Interface). Section 5.1.4 says the function ID for SMC32 is
Sure. |
Oh, that's just wrong. Bit 30 determines whether the calling convention is 32 or 64 bits, but Elfloader is using the 32 bit calling convention on 64-bit, so all codes should be the same. |
Note that this does not work for 32-bit ARM, at least when tested on QEMU with: ../init-build.sh -DPLATFORM=qemu-arm-virt -DAARCH32=1 -DSMP=1 See [1] for details. [1]: seL4#239 (comment). Signed-off-by: Ivan Velickovic <[email protected]>
My understanding is the HVC ABI is the exact same as the SMC one, it's just a difference with exception levels.
Also adds a commit to automatically add the right
-smpflags with the generatedsimulatescripts.Draft because I did this very quickly and need to review my own changes more.
So far I have tested that SMP/uni-core QEMU works and that I haven't broken PSCI SVC functionality by testing SMP on the Odroid-C4.