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Add 1bit SDR #3

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Add 1bit SDR #3

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303a24f
Add 1bit SDR
rhgndf Nov 3, 2024
46a2f40
Use DDR sampling
rhgndf Nov 3, 2024
09bd624
Fix tab indentation
rhgndf Nov 3, 2024
5bba9d4
Fix bug
rhgndf Nov 4, 2024
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35 changes: 35 additions & 0 deletions hsdaoh_nano9k_1bit_sdr/fifo_hs/fifo_hs.ipc
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Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
[General]
ipc_version=4
file=fifo_hs
module=FIFO_HS_Top
target_device=gw1nr9c-004
type=fifo_hs
version=1.0

[Config]
AlmostEmptyFlag=true
AlmostEmptyFlagItem=Empty_Single Threshold Constant Parameter
AlmostFullFlag=false
AlmostFullFlagItem=Full_Single Threshold Constant Parameter
BSRAM=true
ControlledByRdEn=false
ECCSelected=false
EmptyClear=1
EmptySet=1
EnReset=false
FirstWordFallThrough=false
FullClear=1
FullSet=1
LANG=0
OutputRegistersSelected=false
REG=false
ReadDataNum=false
ReadDataWidth=16
ReadDepth=8192
ResetSynchronization=false
SSRAM=false
StandardFIFO=true
Synthesis_tool=GowinSynthesis
WriteDataNum=false
WriteDataWidth=16
WriteDepth=8192
811 changes: 811 additions & 0 deletions hsdaoh_nano9k_1bit_sdr/fifo_hs/fifo_hs.v
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