Analog Robustness CI — will your AI model survive analog hardware? Break-even economics + noise/drift/ADC robustness simulation for AIMC and photonic accelerators.

VOLT — Virtual Ohmic Logic Testbench: Rust AIMC crossbar physics simulator (Ohm/KCL, DAC/ADC, noise). Optional PyO3 bindings.

Microservice 'data mapping processor' for retrieving dynamic data from the asset connector and providing this data as a standard AAS structure