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Merged
merged 2 commits into from
Aug 18, 2025
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hal_stm32: update stm32n6 hal and ll #299

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b72fb79
stm32cube: update stm32n6 to cube version V1.2.0
djiatsaf-st Jul 29, 2025
d175fc2
stm32cube: common_ll: Regeneration after cube updates
djiatsaf-st Jul 29, 2025
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2 changes: 1 addition & 1 deletion stm32cube/common_ll/README.rst
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Expand Up @@ -29,7 +29,7 @@ stm32l5xx 1.5.1
stm32mp13xx 1.2.0
stm32mp1xx 1.7.0
stm32mp2xx 1.1.0
stm32n6xx 1.0.0
stm32n6xx 1.2.0
stm32u0xx 1.2.0
stm32u3xx 1.1.0
stm32u5xx 1.7.0
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2 changes: 1 addition & 1 deletion stm32cube/stm32n6xx/CMakeLists.txt
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Expand Up @@ -23,8 +23,8 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CRYP_EX drivers/src/stm32n6xx_
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DCMI drivers/src/stm32n6xx_hal_dcmi.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DCMIPP drivers/src/stm32n6xx_hal_dcmipp.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA drivers/src/stm32n6xx_hal_dma.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA_EX drivers/src/stm32n6xx_hal_dma_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA2D drivers/src/stm32n6xx_hal_dma2d.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA_EX drivers/src/stm32n6xx_hal_dma_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DTS drivers/src/stm32n6xx_hal_dts.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_ETH drivers/src/stm32n6xx_hal_eth.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_ETH_EX drivers/src/stm32n6xx_hal_eth_ex.c)
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15 changes: 9 additions & 6 deletions stm32cube/stm32n6xx/README
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Expand Up @@ -6,7 +6,7 @@ Origin:
http://www.st.com/en/embedded-software/stm32cuben6.html

Status:
version v1.0.0
version v1.2.0

Purpose:
ST Microelectronics official MCU package for STM32N6 series.
Expand All @@ -23,7 +23,7 @@ URL:
https://github.com/STMicroelectronics/STM32CubeN6

Commit:
7cc0f778f9ed60d2a00ad9ba7794a3e7feaa3596
85170d2c6eaa438622ed879caa4d7bcc6cc3920d

Maintained-by:
External
Expand Down Expand Up @@ -66,10 +66,13 @@ Patch List:
Impacted files:
stm32cube/stm32n6xx/drivers/src/stm32n6xx_hal_xspi.c
Internal reference: 212765
Status : implemented

*Fix SDIO polling mode data transfer issues
Fixes two related issues in the STM32N6 SDIO driver: incorrect block count calculation
that caused the card to hang, and improper buffer size handling that led to misaligned FIFO writes.
Fixes two related issues in the STM32N6 SDIO driver: incorrect block count calculation
that caused the card to hang, and improper buffer size handling that led to misaligned FIFO writes.
Together, these changes ensure correct and stable data transfer in polling mode.
Impacted file:
stm32cube/stm32n6xx/drivers/src/stm32n6xx_hal_sdio.c
Impacted file:
stm32cube/stm32n6xx/drivers/src/stm32n6xx_hal_sdio.c

See release_note.html from STM32Cube
21 changes: 14 additions & 7 deletions stm32cube/stm32n6xx/drivers/include/Legacy/stm32_hal_legacy.h
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Expand Up @@ -472,9 +472,9 @@ extern "C" {
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7)
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5)
/* #define PAGESIZE FLASH_PAGE_SIZE */
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 */
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
Expand Down Expand Up @@ -538,6 +538,10 @@ extern "C" {
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
#endif /* STM32H7 */
#if defined(STM32H7RS)
#define FLASH_OPTKEY1 FLASH_OPT_KEY1
#define FLASH_OPTKEY2 FLASH_OPT_KEY2
#endif /* STM32H7RS */
#if defined(STM32U5)
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
Expand All @@ -560,6 +564,9 @@ extern "C" {
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
#define OB_nBOOT0_SET OB_NBOOT0_SET
#endif /* STM32U0 */
#if defined(STM32H5)
#define FLASH_ECC_AREA_EDATA FLASH_ECC_AREA_EDATA_BANK1
#endif /* STM32H5 */

/**
* @}
Expand Down Expand Up @@ -1299,22 +1306,22 @@ extern "C" {
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */

#if defined(STM32F7)
#if defined(STM32F7) || defined(STM32WB)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
#endif /* STM32F7 */
#endif /* STM32F7 || STM32WB */

#if defined(STM32H7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
#endif /* STM32H7 */

#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB)
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
#endif /* STM32F7 || STM32H7 || STM32L0 */
#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */

/**
* @}
Expand Down Expand Up @@ -3948,7 +3955,7 @@ extern "C" {
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
defined (STM32WBA) || defined (STM32H5) || \
defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0)
defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
Expand Down
8 changes: 4 additions & 4 deletions stm32cube/stm32n6xx/drivers/include/stm32n6xx_hal.h
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Expand Up @@ -78,10 +78,10 @@ extern HAL_TickFreqTypeDef uwTickFreq;
/**
* @brief STM32N6xx HAL Driver version number
*/
#define __STM32N6xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32N6xx_HAL_VERSION_SUB1 (0x00U) /*!< [23:16] sub1 version */
#define __STM32N6xx_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
#define __STM32N6xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32N6xx_HAL_VERSION_MAIN (0x01UL) /*!< [31:24] main version */
#define __STM32N6xx_HAL_VERSION_SUB1 (0x02UL) /*!< [23:16] sub1 version */
#define __STM32N6xx_HAL_VERSION_SUB2 (0x00UL) /*!< [15:8] sub2 version */
#define __STM32N6xx_HAL_VERSION_RC (0x00UL) /*!< [7:0] release candidate */
#define __STM32N6xx_HAL_VERSION ((__STM32N6xx_HAL_VERSION_MAIN << 24U) \
|(__STM32N6xx_HAL_VERSION_SUB1 << 16U) \
|(__STM32N6xx_HAL_VERSION_SUB2 << 8U ) \
Expand Down
36 changes: 2 additions & 34 deletions stm32cube/stm32n6xx/drivers/include/stm32n6xx_hal_adc.h
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Expand Up @@ -1689,8 +1689,7 @@ __LL_ADC_CONVERT_DATA_RESOLUTION((__DATA__),\
* @brief Helper macro to calculate the voltage (unit: mVolt)
* corresponding to a ADC conversion data (unit: digital value).
* @note Analog reference voltage (Vref+) must be either known from
* user board environment or can be calculated using ADC measurement
* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
* user board environment.
* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
* (unit: digital value).
Expand All @@ -1713,8 +1712,7 @@ __LL_ADC_CALC_DATA_TO_VOLTAGE((__VREFANALOG_VOLTAGE__),\
* corresponding to a ADC conversion data (unit: digital value)
* in differential ended mode.
* @note Analog reference voltage (Vref+) must be either known from
* user board environment or can be calculated using ADC measurement
* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
* user board environment.
* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
* (unit: digital value).
Expand All @@ -1732,36 +1730,6 @@ __LL_ADC_CALC_DIFF_DATA_TO_VOLTAGE((__VREFANALOG_VOLTAGE__),\
(__ADC_DATA__),\
(__ADC_RESOLUTION__))

/**
* @brief Helper macro to calculate analog reference voltage (Vref+)
* (unit: mVolt) from ADC conversion data of internal voltage
* reference VrefInt.
* @note Computation is using VrefInt calibration value
* stored in system memory for each device during production.
* @note This voltage depends on user board environment: voltage level
* connected to pin Vref+.
* On devices with small package, the pin Vref+ is not present
* and internally bonded to pin Vdda.
* @note On this STM32 series, calibration data of internal voltage reference
* VrefInt corresponds to a resolution of 12 bits,
* this is the recommended ADC resolution to convert voltage of
* internal voltage reference VrefInt.
* Otherwise, this macro performs the processing to scale
* ADC conversion data to 12 bits.
* @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits)
* of internal voltage reference VrefInt (unit: digital value).
* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
* @arg @ref ADC_RESOLUTION_12B
* @arg @ref ADC_RESOLUTION_10B
* @arg @ref ADC_RESOLUTION_8B
* @arg @ref ADC_RESOLUTION_6B
* @retval Analog reference voltage (unit: mV)
*/
#define __HAL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
__ADC_RESOLUTION__) \
__LL_ADC_CALC_VREFANALOG_VOLTAGE((__VREFINT_ADC_DATA__),\
(__ADC_RESOLUTION__))


/**
* @}
Expand Down
8 changes: 4 additions & 4 deletions stm32cube/stm32n6xx/drivers/include/stm32n6xx_hal_bsec.h
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Expand Up @@ -159,10 +159,10 @@ typedef struct
/** @defgroup BSEC_Lifecycle_State BSEC Device lifecycle state
* @{
*/
#define HAL_BSEC_OPEN_STATE (0x16U << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in open state */
#define HAL_BSEC_CLOSED_STATE (0x0DU << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in closed state */
#define HAL_BSEC_INVALID_STATE (0x07U << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in invalid state */
#define HAL_BSEC_INVALID_STATE_WITH_TAMPER (0x23U << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in invalid state with an active confirmed tamper triggered */
#define HAL_BSEC_OPEN_STATE (0x16UL << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in open state */
#define HAL_BSEC_CLOSED_STATE (0x0DUL << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in closed state */
#define HAL_BSEC_INVALID_STATE (0x07UL << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in invalid state */
#define HAL_BSEC_INVALID_STATE_WITH_TAMPER (0x23UL << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in invalid state with an active confirmed tamper triggered */
/**
* @}
*/
Expand Down
9 changes: 9 additions & 0 deletions stm32cube/stm32n6xx/drivers/include/stm32n6xx_hal_conf.h
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Expand Up @@ -206,6 +206,7 @@
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SDIO_REGISTER_CALLBACKS 0U /* SDIO register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
Expand All @@ -230,6 +231,10 @@

#define USE_SD_TRANSCEIVER 0U

/* ################## SDIO peripheral configuration ########################## */
#define USE_SDIO_TRANSCEIVER 1U
#define SDIO_MAX_IO_NUMBER 7U /*!< SDIO device support maximum IO number */

/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
Expand Down Expand Up @@ -426,6 +431,10 @@
#include "stm32n6xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */

#ifdef HAL_SDIO_MODULE_ENABLED
#include "stm32n6xx_hal_sdio.h"
#endif /* HAL_SDIO_MODULE_ENABLED */

#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32n6xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
Expand Down
20 changes: 17 additions & 3 deletions stm32cube/stm32n6xx/drivers/include/stm32n6xx_hal_cortex.h
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Expand Up @@ -51,14 +51,16 @@ typedef struct
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
uint8_t Number; /*!< Specifies the number of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Number */
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
uint32_t LimitAddress; /*!< Specifies the limit address of the region to protect. */
uint8_t AttributesIndex; /*!< Specifies the memory attributes index.
This parameter can be a value of @ref CORTEX_MPU_Attributes_Number */
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
uint32_t LimitAddress; /*!< Specifies the limit address of the region to protect. */
uint8_t AccessPermission; /*!< Specifies the region access permission type.
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
uint8_t DisableExec; /*!< Specifies the instruction access status.
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
uint8_t DisablePrivExec; /*!< Specifies if privileged software can execute instructions from this region.
This parameter can be a value of @ref CORTEX_MPU_Priv_Instruction_Access */
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
} MPU_Region_InitTypeDef;
Expand All @@ -75,7 +77,7 @@ typedef struct
This parameter can be a value of @ref CORTEX_MPU_Attributes_Number */

uint8_t Attributes; /*!< Specifies the memory attributes vue.
This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
This parameter can be a value of @ref CORTEX_MPU_Attributes */

} MPU_Attributes_InitTypeDef;
/**
Expand Down Expand Up @@ -148,6 +150,15 @@ typedef struct
* @}
*/

/** @defgroup CORTEX_MPU_Priv_Instruction_Access CORTEX MPU Privileged Instruction Access
* @{
*/
#define MPU_PRIV_INSTRUCTION_ACCESS_ENABLE 0U
#define MPU_PRIV_INSTRUCTION_ACCESS_DISABLE 1U
/**
* @}
*/

/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
* @{
*/
Expand Down Expand Up @@ -352,6 +363,9 @@ void HAL_MPU_ConfigMemoryAttributes_NS(const MPU_Attributes_InitTypeDef *pMPU_At
#define IS_MPU_INSTRUCTION_ACCESS(__STATE__) (((__STATE__) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
((__STATE__) == MPU_INSTRUCTION_ACCESS_DISABLE))

#define IS_MPU_PRIV_INSTRUCTION_ACCESS(__STATE__) (((__STATE__) == MPU_PRIV_INSTRUCTION_ACCESS_ENABLE) || \
((__STATE__) == MPU_PRIV_INSTRUCTION_ACCESS_DISABLE))

#define IS_MPU_ACCESS_SHAREABLE(__STATE__) (((__STATE__) == MPU_ACCESS_OUTER_SHAREABLE) || \
((__STATE__) == MPU_ACCESS_INNER_SHAREABLE) || \
((__STATE__) == MPU_ACCESS_NOT_SHAREABLE))
Expand Down
2 changes: 1 addition & 1 deletion stm32cube/stm32n6xx/drivers/include/stm32n6xx_hal_cryp.h
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Expand Up @@ -736,7 +736,7 @@ HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp);
HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp);
void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp);
void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp);
HAL_StatusTypeDef HAL_CRYP_SetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeDef *pConf);
HAL_StatusTypeDef HAL_CRYP_SetConfig(CRYP_HandleTypeDef *hcryp, const CRYP_ConfigTypeDef *pConf);
HAL_StatusTypeDef HAL_CRYP_GetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeDef *pConf);
#if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
HAL_StatusTypeDef HAL_CRYP_RegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID,
Expand Down
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