zephyrproject-rtos · LucasTambor · Jan 20, 2025 · Jan 20, 2025 · Jan 10, 2025 · Jan 24, 2025
diff --git a/boards/espressif/esp32c6_devkitc/Kconfig b/boards/espressif/esp32c6_devkitc/Kconfig
@@ -3,4 +3,5 @@
 
 config HEAP_MEM_POOL_ADD_SIZE_BOARD
 	int
-	default 4096
+	default 4096 if BOARD_ESP32C6_DEVKITC_ESP32C6_HPCORE
+	default 256 if BOARD_ESP32C6_DEVKITC_ESP32C6_LPCORE
diff --git a/boards/espressif/esp32c6_devkitc/Kconfig.esp32c6_devkitc b/boards/espressif/esp32c6_devkitc/Kconfig.esp32c6_devkitc
@@ -5,3 +5,5 @@
 
 config BOARD_ESP32C6_DEVKITC
 	select SOC_ESP32_C6_WROOM_1U_N8
+	select SOC_ESP32C6_HPCORE if BOARD_ESP32C6_DEVKITC_ESP32C6_HPCORE
+	select SOC_ESP32C6_LPCORE if BOARD_ESP32C6_DEVKITC_ESP32C6_LPCORE
diff --git a/boards/espressif/esp32c6_devkitc/doc/index.rst b/boards/espressif/esp32c6_devkitc/doc/index.rst
@@ -183,7 +183,7 @@ To build the sample application using sysbuild use the command:
 .. zephyr-app-commands::
    :tool: west
    :zephyr-app: samples/hello_world
-   :board: esp32c6_devkitc
+   :board: esp32c6_devkitc/esp32c6/hpcore
    :goals: build
    :west-args: --sysbuild
    :compact:
@@ -232,7 +232,7 @@ Build and flash applications as usual (see :ref:`build_an_application` and
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: esp32c6_devkitc
+   :board: esp32c6_devkitc/esp32c6/hpcore
    :goals: build
 
 The usual ``flash`` target will work with the ``esp32c6_devkitc`` board
@@ -241,7 +241,7 @@ application.
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: esp32c6_devkitc
+   :board: esp32c6_devkitc/esp32c6/hpcore
    :goals: flash
 
 Open the serial monitor using the following command:
@@ -256,7 +256,7 @@ message in the monitor:
 .. code-block:: console
 
    ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
-   Hello World! esp32c6_devkitc
+   Hello World! esp32c6_devkitc/esp32c6/hpcore
 
 Debugging
 *********
@@ -273,17 +273,40 @@ Here is an example for building the :zephyr:code-sample:`hello_world` applicatio
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: esp32c6_devkitc
+   :board: esp32c6_devkitc/esp32c6/hpcore
    :goals: build flash
    :gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
 
 You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: esp32c6_devkitc
+   :board: esp32c6_devkitc/esp32c6/hpcore
    :goals: debug
 
+Low-Power CPU (LP CORE)
+***********************
+
+The ESP32-C6 SoC has two RISC-V cores: the High-Performance Core (HP CORE) and the Low-Power Core (LP CORE).
+It features ultra low power consumption, an interrupt controller, a debug module and a system bus
+interface for memory and peripheral access.
+
+The LP Core is in sleep mode by default. It has two application scenarios:
+
+- Power insensitive scenario: When the High-Performance CPU (HP Core) is active, the LP Core can assist the HP CPU with some speed and efficiency-insensitive controls and computations.
+- Power sensitive scenario: When the HP CPU is in the power-down state to save power, the LP Core can be woken up to handle some external wake-up events.
+
+For more information, check the datasheet at `ESP32-C6 Datasheet`_ or the technical reference
+manual at `ESP32-C6 Technical Reference Manual`_.
+
+The LP Core support is fully integrated with :ref:`sysbuild`. The user can enable the LP Core by adding
+the following configuration to the project:
+
+.. code:: cfg
+
+   CONFIG_ULP_COPROC_ENABLED=y
+
+See :zephyr:code-sample-category:`lp-core` folder as code reference.
 
 References
 **********

diff --git a/...32c6_devkitc/esp32c6_devkitc-pinctrl.dtsi → ...vkitc/esp32c6_devkitc_hpcore-pinctrl.dtsi b/...32c6_devkitc/esp32c6_devkitc-pinctrl.dtsi → ...vkitc/esp32c6_devkitc_hpcore-pinctrl.dtsi
diff --git a/...essif/esp32c6_devkitc/esp32c6_devkitc.dts → ...sp32c6_devkitc/esp32c6_devkitc_hpcore.dts b/...essif/esp32c6_devkitc/esp32c6_devkitc.dts → ...sp32c6_devkitc/esp32c6_devkitc_hpcore.dts
@@ -7,12 +7,12 @@
 /dts-v1/;
 
 #include <espressif/esp32c6/esp32c6_wroom_n8.dtsi>
-#include "esp32c6_devkitc-pinctrl.dtsi"
+#include "esp32c6_devkitc_hpcore-pinctrl.dtsi"
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 #include <espressif/partitions_0x0_default.dtsi>
 
 / {
-	model = "esp32c6_devkitc";
+	model = "esp32c6_devkitc HP Core";
 	compatible = "espressif,esp32c6";
 
 	chosen {

diff --git a/...ssif/esp32c6_devkitc/esp32c6_devkitc.yaml → ...p32c6_devkitc/esp32c6_devkitc_hpcore.yaml b/...ssif/esp32c6_devkitc/esp32c6_devkitc.yaml → ...p32c6_devkitc/esp32c6_devkitc_hpcore.yaml
@@ -1,5 +1,5 @@
-identifier: esp32c6_devkitc
-name: ESP32-C6
+identifier: esp32c6_devkitc/esp32c6/hpcore
+name: ESP32-C6-DevKitC HP Core
 vendor: espressif
 type: mcu
 arch: riscv

diff --git a/...esp32c6_devkitc/esp32c6_devkitc_defconfig → ..._devkitc/esp32c6_devkitc_hpcore_defconfig b/...esp32c6_devkitc/esp32c6_devkitc_defconfig → ..._devkitc/esp32c6_devkitc_hpcore_defconfig
diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.dts b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.dts
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/dts-v1/;
+
+#include <espressif/esp32c6/esp32c6_lpcore_wroom_n4.dtsi>
+#include <espressif/partitions_0x0_default.dtsi>
+
+/ {
+	model = "Espressif ESP32C6-DevkitC LPCORE";
+	compatible = "espressif,esp32c6";
+
+	chosen {
+		zephyr,sram = &sramlp;
+		zephyr,code-partition = &slot0_lpcore_partition;
+		zephyr,console = &lp_uart;
+		zephyr,shell-uart = &lp_uart;
+	};
+
+	// aliases {
+	// 	sw0 = &user_button1;
+	// };
+
+	// gpio_keys {
+	// 	compatible = "gpio-keys";
+	// 	user_button1: button_1 {
+	// 		label = "User SW1";
+	// 		gpios = <&lp_gpio 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+	// 		zephyr,code = <INPUT_KEY_0>;
+	// 	};
+	// };
+};
+
+&lp_uart {
+	status = "okay";
+	current-speed = <115200>;
+};
diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.yaml b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.yaml
@@ -0,0 +1,16 @@
+identifier: esp32c6_devkitc/esp32c6/lpcore
+name: ESP32-C6-DevKitC LP Core
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+supported:
+  - cpu
+testing:
+  only_tags:
+    - introduction
+  ignore_tags:
+    - kernel
+    - posix
+    - chre
+vendor: espressif
diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig
@@ -0,0 +1,24 @@
+# Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MAIN_STACK_SIZE=1024
+CONFIG_ISR_STACK_SIZE=64
+CONFIG_IDLE_STACK_SIZE=32
+
+# Memory protection
+CONFIG_THREAD_STACK_INFO=n
+CONFIG_THREAD_CUSTOM_DATA=n
+
+# Boot
+CONFIG_BOOT_BANNER=n
+
+# Console
+CONFIG_SERIAL=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_PRINTK=n
+CONFIG_CBPRINTF_NANO=y
+
+# Build
+CONFIG_SIZE_OPTIMIZATIONS=y
+CONFIG_BUSYWAIT_CPU_LOOPS_PER_USEC=4
diff --git a/drivers/clock_control/clock_control_esp32.c b/drivers/clock_control/clock_control_esp32.c
@@ -105,7 +105,8 @@ static void esp32_clock_perip_init(void)
 	soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
 
 	if ((rst_reason != RESET_REASON_CPU0_MWDT0) && (rst_reason != RESET_REASON_CPU0_MWDT1) &&
-	    (rst_reason != RESET_REASON_CPU0_SW) && (rst_reason != RESET_REASON_CPU0_RTC_WDT)) {
+	    (rst_reason != RESET_REASON_CPU0_SW) && (rst_reason != RESET_REASON_CPU0_RTC_WDT) &&
+	    (rst_reason != RESET_REASON_CPU0_JTAG)) {
 
 		periph_ll_disable_clk_set_rst(PERIPH_UART1_MODULE);
 		periph_ll_disable_clk_set_rst(PERIPH_I2C0_MODULE);

diff --git a/drivers/gpio/CMakeLists.txt b/drivers/gpio/CMakeLists.txt
@@ -115,6 +115,7 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_XEC_V2     gpio_mchp_xec_v2.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_XLNX_AXI   gpio_xlnx_axi.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_XLNX_PS    gpio_xlnx_ps.c gpio_xlnx_ps_bank.c)
 zephyr_library_sources_ifdef(CONFIG_GPIO_XMC4XXX    gpio_xmc4xxx.c)
+zephyr_library_sources_ifdef(CONFIG_LPGPIO_ESP32    gpio_esp32_lpgpio.c)
 # zephyr-keep-sorted-stop
 
 # zephyr-keep-sorted-start

diff --git a/drivers/gpio/Kconfig.esp32 b/drivers/gpio/Kconfig.esp32
@@ -6,6 +6,13 @@
 config GPIO_ESP32
 	bool "ESP32 GPIO"
 	default y
-	depends on DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED
+	depends on DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED && !SOC_ESP32C6_LPCORE
+	help
+	  Enables the ESP32 GPIO driver
+
+config LPGPIO_ESP32
+	bool "ESP32 Low Power GPIO"
+	default y
+	depends on DT_HAS_ESPRESSIF_ESP32_GPIO_ENABLED && SOC_ESP32C6_LPCORE
 	help
 	  Enables the ESP32 GPIO driver