Skip to content

Conversation

@avolmat-st
Copy link

Correct a typo leading to not not configuring correctly the STM32N6 xspi2 input clock.

Alain Volmat added 2 commits July 11, 2025 15:38
The xspi2 clock source is wrong due to typo doing XSPI1_SEL instead
of XSPI2_SEL.

Signed-off-by: Mickael Guene <[email protected]>
Signed-off-by: Alain Volmat <[email protected]>
The xspi2 clock source is wrong due to typo doing XSPI1_SEL instead
of XSPI2_SEL.

Signed-off-by: Mickael Guene <[email protected]>
Signed-off-by: Alain Volmat <[email protected]>
@sonarqubecloud
Copy link

@erwango
Copy link
Member

erwango commented Aug 18, 2025

Have you been able to test this using mcuboot + application using xspi2 (such as display) ?
It wasn't working in my case

@avolmat-st avolmat-st marked this pull request as draft August 18, 2025 13:09
@avolmat-st avolmat-st marked this pull request as ready for review August 18, 2025 16:38
@avolmat-st
Copy link
Author

@erwango, sorry, reason for failure is because this branch is prior to PR #92900 which disable the PSRAM cache. Disabling the PSRAM cache allows to work properly.
Do you want me to rebase this branch on latest main so that it will work directly ?

Copy link
Member

@erwango erwango left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This would require to also change the following in impacted nodes

-		ospi-max-frequency = <DT_FREQ_M(200)>;
+		ospi-max-frequency = <DT_FREQ_M(100)>;

as for now we have a bug to support 200MHz

@erwango
Copy link
Member

erwango commented Aug 29, 2025

Superseded by #95153

@avolmat-st avolmat-st closed this Aug 29, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

platform: STM32 ST Micro STM32

Projects

None yet

Development

Successfully merging this pull request may close these issues.

7 participants