Cleanup of init/device and kernel internal headers

arch/Kconfig

@@ -230,6 +230,16 @@ config SRAM_BASE_ADDRESS
 	  /chosen/zephyr,sram in devicetree. The user should generally avoid
 	  changing it via menuconfig or in configuration files.
 
+config XIP
+	bool "Execute in place"
+	help
+	  This option allows zephyr to operate with its text and read-only
+	  sections residing in ROM (or similar read-only memory). Not all boards
+	  support this option so it must be used with care; you must also
+	  supply a linker command file when building your image. Enabling this
+	  option increases both the code and data footprint of the image.
+
+
 if ARC || ARM || ARM64 || X86 || RISCV || RX
 
 # Workaround for not being able to have commas in macro arguments

arch/arc/core/prep_c.c

@@ -22,7 +22,8 @@
 #include <zephyr/arch/arc/v2/aux_regs.h>
 #include <zephyr/arch/arc/cluster.h>
 #include <zephyr/kernel_structs.h>
-#include <kernel_internal.h>
+#include <zephyr/arch/common/xip.h>
+#include <zephyr/arch/common/init.h>
 #include <zephyr/platform/hooks.h>
 #include <zephyr/arch/cache.h>
 
@@ -67,7 +68,7 @@ extern char __device_states_end[];
  */
 static void dev_state_zero(void)
 {
-	z_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
+	arch_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
 }
 #endif
 
@@ -91,11 +92,11 @@ void z_prep_c(void)
 	arc_cluster_scm_enable();
 #endif
 
-	z_bss_zero();
+	arch_bss_zero();
 #ifdef __CCAC__
 	dev_state_zero();
 #endif
-	z_data_copy();
+	arch_data_copy();
 #if CONFIG_ARCH_CACHE
 	arch_cache_init();
 #endif

arch/arm/core/cortex_a_r/prep_c.c

@@ -24,6 +24,8 @@
 #include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
 #include <zephyr/platform/hooks.h>
 #include <zephyr/arch/cache.h>
+#include <zephyr/arch/common/xip.h>
+#include <zephyr/arch/common/init.h>
 
 #if defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)
 #include <cortex_a_r/stack.h>
@@ -107,8 +109,8 @@ void z_prep_c(void)
 #if defined(CONFIG_CPU_HAS_FPU)
 	z_arm_floating_point_init();
 #endif
-	z_bss_zero();
-	z_data_copy();
+	arch_bss_zero();
+	arch_data_copy();
 #if ((defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)) && defined(CONFIG_INIT_STACKS))
 	z_arm_init_stacks();
 #endif

arch/arm/core/cortex_m/prep_c.c

@@ -23,6 +23,8 @@
 #include <zephyr/platform/hooks.h>
 #include <zephyr/arch/cache.h>
 #include <cortex_m/debug.h>
+#include <zephyr/arch/common/xip.h>
+#include <zephyr/arch/common/init.h>
 
 /*
  * GCC can detect if memcpy is passed a NULL argument, however one of
@@ -59,7 +61,7 @@ void __weak relocate_vector_table(void)
 	/* Copy vector table to its location in SRAM */
 	size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
 
-	z_early_memcpy(_sram_vector_start, _vector_start, vector_size);
+	arch_early_memcpy(_sram_vector_start, _vector_start, vector_size);
 #endif
 	SCB->VTOR = VECTOR_ADDRESS & VTOR_MASK;
 	barrier_dsync_fence_full();
@@ -203,8 +205,8 @@ void z_prep_c(void)
 #if defined(CONFIG_CPU_HAS_FPU)
 	z_arm_floating_point_init();
 #endif
-	z_bss_zero();
-	z_data_copy();
+	arch_bss_zero();
+	arch_data_copy();
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	/* Invoke SoC-specific interrupt controller initialization */
 	z_soc_irq_init();

arch/arm/core/cortex_m/reset.S

@@ -19,7 +19,7 @@
 _ASM_FILE_PROLOGUE
 
 GTEXT(z_arm_reset)
-GTEXT(z_early_memset)
+GTEXT(arch_early_memset)
 GDATA(z_interrupt_stacks)
 GDATA(z_main_stack)
 #if defined(CONFIG_DEBUG_THREAD_INFO)
@@ -177,7 +177,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
     ldr r0, =z_interrupt_stacks
     ldr r1, =0xaa
     ldr r2, =CONFIG_ISR_STACK_SIZE + MPU_GUARD_ALIGN_AND_SIZE
-    bl z_early_memset
+    bl arch_early_memset
 #endif
 
     /*

arch/arm64/core/early_mem_funcs.S

@@ -18,9 +18,9 @@ _ASM_FILE_PROLOGUE
  * to memset or memcpy on its own.
  */
 
-/* void z_early_memset(void *dst, int c, size_t n) */
-GTEXT(z_early_memset)
-SECTION_FUNC(TEXT, z_early_memset)
+/* void arch_early_memset(void *dst, int c, size_t n) */
+GTEXT(arch_early_memset)
+SECTION_FUNC(TEXT, arch_early_memset)
 
 	/* is dst pointer 8-bytes aligned? */
 	tst	x0, #0x7
@@ -51,9 +51,9 @@ SECTION_FUNC(TEXT, z_early_memset)
 
 4:	ret
 
-/* void z_early_memcpy(void *dst, const void *src, size_t n) */
-GTEXT(z_early_memcpy)
-SECTION_FUNC(TEXT, z_early_memcpy)
+/* void arch_early_memcpy(void *dst, const void *src, size_t n) */
+GTEXT(arch_early_memcpy)
+SECTION_FUNC(TEXT, arch_early_memcpy)
 
 	/* are dst and src pointers 8-bytes aligned? */
 	orr	x8, x1, x0

arch/arm64/core/prep_c.c

@@ -14,10 +14,11 @@
  * initialization is performed.
  */
 
-#include <kernel_internal.h>
 #include <zephyr/linker/linker-defs.h>
 #include <zephyr/platform/hooks.h>
 #include <zephyr/arch/cache.h>
+#include <zephyr/arch/common/xip.h>
+#include <zephyr/arch/common/init.h>
 
 extern void z_arm64_mm_init(bool is_primary_core);
 
@@ -39,8 +40,8 @@ void z_prep_c(void)
 	/* Initialize tpidrro_el0 with our struct _cpu instance address */
 	write_tpidrro_el0((uintptr_t)&_kernel.cpus[0]);
 
-	z_bss_zero();
-	z_data_copy();
+	arch_bss_zero();
+	arch_data_copy();
 #ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK
 	/* After bss clean, _kernel.cpus is in bss section */
 	z_arm64_safe_exception_stack_init();

arch/common/CMakeLists.txt

@@ -17,6 +17,9 @@ if(CONFIG_GEN_ISR_TABLES)
   )
 endif()
 
+zephyr_library_sources(init.c)
+zephyr_library_sources_ifdef(CONFIG_XIP xip.c)
+
 zephyr_library_sources_ifdef(
   CONFIG_ISR_TABLE_SHELL
   isr_tables_shell.c

arch/common/init.c

@@ -0,0 +1,129 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ * Copyright The Zephyr Project Contributors
+ */
+
+#include <stddef.h>
+#include <string.h>
+#include <zephyr/sys/util_macro.h>
+#include <zephyr/linker/section_tags.h>
+#include <zephyr/linker/linker-defs.h>
+
+/* LCOV_EXCL_START
+ *
+ * This code is called so early in the boot process that code coverage
+ * doesn't work properly. In addition, not all arches call this code,
+ * some like x86 do this with optimized assembly
+ */
+
+/**
+ * @brief equivalent of memset() for early boot usage
+ *
+ * Architectures that can't safely use the regular (optimized) memset very
+ * early during boot because e.g. hardware isn't yet sufficiently initialized
+ * may override this with their own safe implementation.
+ */
+__boot_func
+void __weak arch_early_memset(void *dst, int c, size_t n)
+{
+	(void) memset(dst, c, n);
+}
+
+/**
+ * @brief equivalent of memcpy() for early boot usage
+ *
+ * Architectures that can't safely use the regular (optimized) memcpy very
+ * early during boot because e.g. hardware isn't yet sufficiently initialized
+ * may override this with their own safe implementation.
+ */
+__boot_func
+void __weak arch_early_memcpy(void *dst, const void *src, size_t n)
+{
+	(void) memcpy(dst, src, n);
+}
+
+/**
+ * @brief Clear BSS
+ *
+ * This routine clears the BSS region, so all bytes are 0.
+ */
+__boot_func
+void arch_bss_zero(void)
+{
+	if (IS_ENABLED(CONFIG_SKIP_BSS_CLEAR)) {
+		return;
+	}
+
+	arch_early_memset(__bss_start, 0, __bss_end - __bss_start);
+#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ccm))
+	arch_early_memset(&__ccm_bss_start, 0,
+		       (uintptr_t) &__ccm_bss_end
+		       - (uintptr_t) &__ccm_bss_start);
+#endif
+#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_dtcm))
+	arch_early_memset(&__dtcm_bss_start, 0,
+		       (uintptr_t) &__dtcm_bss_end
+		       - (uintptr_t) &__dtcm_bss_start);
+#endif
+#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ocm))
+	arch_early_memset(&__ocm_bss_start, 0,
+		       (uintptr_t) &__ocm_bss_end
+		       - (uintptr_t) &__ocm_bss_start);
+#endif
+#ifdef CONFIG_CODE_DATA_RELOCATION
+	extern void bss_zeroing_relocation(void);
+
+	bss_zeroing_relocation();
+#endif	/* CONFIG_CODE_DATA_RELOCATION */
+#ifdef CONFIG_COVERAGE_GCOV
+	arch_early_memset(&__gcov_bss_start, 0,
+		       ((uintptr_t) &__gcov_bss_end - (uintptr_t) &__gcov_bss_start));
+#endif /* CONFIG_COVERAGE_GCOV */
+#ifdef CONFIG_NOCACHE_MEMORY
+arch_early_memset(&_nocache_ram_start, 0,
+		   (uintptr_t) &_nocache_ram_end
+		   - (uintptr_t) &_nocache_ram_start);
+#endif
+}
+
+#ifdef CONFIG_LINKER_USE_BOOT_SECTION
+/**
+ * @brief Clear BSS within the boot region
+ *
+ * This routine clears the BSS within the boot region.
+ * This is separate from arch_bss_zero() as boot region may
+ * contain symbols required for the boot process before
+ * paging is initialized.
+ */
+__boot_func
+void arch_bss_zero_boot(void)
+{
+	arch_early_memset(&lnkr_boot_bss_start, 0,
+		       (uintptr_t)&lnkr_boot_bss_end
+		       - (uintptr_t)&lnkr_boot_bss_start);
+}
+#endif /* CONFIG_LINKER_USE_BOOT_SECTION */
+
+#ifdef CONFIG_LINKER_USE_PINNED_SECTION
+/**
+ * @brief Clear BSS within the pinned region
+ *
+ * This routine clears the BSS within the pinned region.
+ * This is separate from arch_bss_zero() as pinned region may
+ * contain symbols required for the boot process before
+ * paging is initialized.
+ */
+#ifdef CONFIG_LINKER_USE_BOOT_SECTION
+__boot_func
+#else
+__pinned_func
+#endif /* CONFIG_LINKER_USE_BOOT_SECTION */
+void arch_bss_zero_pinned(void)
+{
+	arch_early_memset(&lnkr_pinned_bss_start, 0,
+		       (uintptr_t)&lnkr_pinned_bss_end
+		       - (uintptr_t)&lnkr_pinned_bss_start);
+}
+#endif /* CONFIG_LINKER_USE_PINNED_SECTION */
+
+/* LCOV_EXCL_STOP */

kernel/xip.c → arch/common/xip.c

@@ -9,6 +9,7 @@
 #include <zephyr/kernel.h>
 #include <kernel_internal.h>
 #include <zephyr/linker/linker-defs.h>
+#include <zephyr/arch/common/init.h>
 
 #ifdef CONFIG_REQUIRES_STACK_CANARIES
 #ifdef CONFIG_STACK_CANARIES_TLS
@@ -23,30 +24,30 @@ extern volatile uintptr_t __stack_chk_guard;
  *
  * This routine copies the data section from ROM to RAM.
  */
-void z_data_copy(void)
+void arch_data_copy(void)
 {
-	z_early_memcpy(&__data_region_start, &__data_region_load_start,
+	arch_early_memcpy(&__data_region_start, &__data_region_load_start,
 		       __data_region_end - __data_region_start);
 #ifdef CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
-	z_early_memcpy(&__ramfunc_region_start, &__ramfunc_load_start,
+	arch_early_memcpy(&__ramfunc_region_start, &__ramfunc_load_start,
 		       __ramfunc_end - __ramfunc_region_start);
 #endif /* CONFIG_ARCH_HAS_RAMFUNC_SUPPORT */
 #ifdef CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT
 #if CONFIG_NOCACHE_MEMORY
-	z_early_memcpy(&_nocache_ram_start, &_nocache_load_start,
+	arch_early_memcpy(&_nocache_ram_start, &_nocache_load_start,
 		       (uintptr_t) &_nocache_ram_size);
 #endif /* CONFIG_NOCACHE_MEMORY */
 #endif /* CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT */
 #if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ccm))
-	z_early_memcpy(&__ccm_data_start, &__ccm_data_load_start,
+	arch_early_memcpy(&__ccm_data_start, &__ccm_data_load_start,
 		       __ccm_data_end - __ccm_data_start);
 #endif
 #if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_itcm))
-	z_early_memcpy(&__itcm_start, &__itcm_load_start,
+	arch_early_memcpy(&__itcm_start, &__itcm_load_start,
 		       (uintptr_t) &__itcm_size);
 #endif
 #if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_dtcm))
-	z_early_memcpy(&__dtcm_data_start, &__dtcm_data_load_start,
+	arch_early_memcpy(&__dtcm_data_start, &__dtcm_data_load_start,
 		       __dtcm_data_end - __dtcm_data_start);
 #endif
 #ifdef CONFIG_CODE_DATA_RELOCATION
@@ -74,7 +75,7 @@ void z_data_copy(void)
 	}
 	__stack_chk_guard = guard_copy;
 #else
-	z_early_memcpy(&_app_smem_start, &_app_smem_rom_start,
+	arch_early_memcpy(&_app_smem_start, &_app_smem_rom_start,
 		       _app_smem_end - _app_smem_start);
 #endif /* CONFIG_REQUIRES_STACK_CANARIES */
 #endif /* CONFIG_USERSPACE */

arch/mips/core/prep_c.c

@@ -9,10 +9,11 @@
  * @brief Full C support initialization
  */
 
-#include <kernel_internal.h>
 #include <zephyr/irq.h>
 #include <zephyr/platform/hooks.h>
 #include <zephyr/arch/cache.h>
+#include <zephyr/arch/common/xip.h>
+#include <zephyr/arch/common/init.h>
 
 static void interrupt_init(void)
 {
@@ -49,7 +50,7 @@ void z_prep_c(void)
 #if defined(CONFIG_SOC_PREP_HOOK)
 	soc_prep_hook();
 #endif
-	z_bss_zero();
+	arch_bss_zero();
 
 	interrupt_init();
 #if CONFIG_ARCH_CACHE