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@arnopo arnopo commented Sep 17, 2025

This Pull reuest enable the support of the ethernet 1 instance

Hardware details:

  • the PHY is a LAN8742A with an Hardware reset based on a GPIO.
  • the clock reference is an externl crystal running at 25 Mhz
  • 16K of non cacheable memory in the SYSRAM is used to store ethernet DMA Buffers and descriptors

Samples tested:

  • samples/net/ipv4_autoconf
  • samples/net/dhcpv4_client

Known current limitation:

  • Ethernet2 instance not implemented
  • sample/net/zperf not build

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github-actions bot commented Sep 17, 2025

The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff
hal_stm32 zephyrproject-rtos/hal_stm32@d768bcb zephyrproject-rtos/hal_stm32@b6f03b6 (main) zephyrproject-rtos/[email protected]

Additional metadata changed:

Name URL Submodules West cmds module.yml Blobs
hal_stm32 2x ✏

DNM label due to: 1 project with metadata changes and 2 blob changes

Note: This message is automatically posted and updated by the Manifest GitHub Action.

@github-actions github-actions bot added manifest manifest-hal_stm32 DNM (manifest) This PR should not be merged (controlled by action-manifest) labels Sep 17, 2025
@erwango
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erwango commented Sep 17, 2025

FYI, it'll have to be rebased on top of #96095

Comment on lines 29 to 32
reset-gpios:
type: phandle-array
description: |
This reset gpio can be used for PHY with hardware reset.
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the ethernet-phy driver is meant to be generic and only implement features, that are defined in the ethernet standard IEEE 802.3. It doesn't specify a reset pin, only the register, which should be enought. If you want a reset pin, you have to create a specific phy driver.

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I have created a LAN8742 inspired from ethernet_phy


#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32mp13_ethernet)
/* APO test : TBD */
heth->Init.ClockSelection = cfg->ClockSelection;
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Ideally please use clock_control_configure()

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I would prefer not use it. The concerning register is a SYSCFG register that is updated by HAL_ETH_Init() function.
If I set it before calling HAL_ETH_Init() it will overwritte it
Else if set it after HAL_ETH_Init() it could generate side effect.

@arnopo arnopo force-pushed the mp13_eth branch 4 times, most recently from 5ed3b84 to 86f88cc Compare September 22, 2025 15:23
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arnopo commented Sep 25, 2025

To be able to run Zperf we need #96575

arnopo added 9 commits October 6, 2025 11:12
Add new flags to allow to select normal and strong ordered attributes
for non-cacheable memory. This is needed for armV7 to be able to configure
all non cacheable memories with another attribute than "device" attribute.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Selecting MT_DEVICE for non cache-able memory does no work in all use
cases.
For instance for net samples a non-cacheable memory can be used for
descriptors and buffers exchanged between the lib and the hardware.
In such context, the net lib can perform some non word aligned memory
this lead to an alignment data abort if the attribute is MT_DEVICE.
Memories attribute should be MT_NORMAL, allowing non aligned transfer

Signed-off-by: Arnaud Pouliquen <[email protected]>arch: arm: mmu: allow selecting memory type for non-cacheable memory
New hal_stm32 revision contains pincontrol for the etherent support.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Introduce stm32mp13 bindings to support the ethernet peripherals.
The "memory-regions" property is used to reference non cacheable memory
for the ETH DMA.
The  "st,ext-phyclk" property aligned Linux binding is used to specify
the PHY clock for RMII.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Add basic support of the LAN8742 RMII phy. The driver is inspired
from the phy_mii generic driver, with the support of a GPIO reset.

Signed-off-by: Arnaud Pouliquen <[email protected]>
The GPIO_MCP230XX config currently depends on the I2C config. This means
that the board/SoC must enable the I2C config to support MCP23xxx devices.
Inverting this dependency allows declaring GPIO_MCP230XX directly in the
board/SoC defconfig without explicitly enabling I2C.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Suggested-by Fin Maaß <[email protected]>
Enable dynamic configuration of region mapping with a 1:1
virtual-to-physical address mapping.
This configuration is aligned with the static declaration of the
MMU table using MMU_REGION_FLAT_ENTRY macro.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Add the Ethernet 0 MAC and MDIO nodes in the device tree.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Signed-off-by: Arif Balik <[email protected]>
The typedef ETH_TxPacketConfigTypeDef is used consistently in the driver.
However, some instances of ETH_TxPacketConfig have not yet been replaced.
On the STM32MP13 series, the ETH_TxPacketConfig typedef is no longer
defined. This cleanup ensures compatibility and consistency.

Signed-off-by: Arnaud Pouliquen <[email protected]>
arnopo added 2 commits October 6, 2025 11:14
Add the support of the stm32mp13 ethernet:
- Adapt to HAL API
- Add support of a memory region in DT for descriptor and buffers
- Add support of  PHY with/without crystal 50MHz

Signed-off-by: Arnaud Pouliquen <[email protected]>
Signed-off-by: Arif Balik <[email protected]>
The STM32MP135F-DK board embeds 2 ethernets. Enable the ethernet1
in RMII mode with associated PHY.

Signed-off-by: Arnaud Pouliquen <[email protected]>
Signed-off-by: Arif Balik <[email protected]>
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sonarqubecloud bot commented Oct 6, 2025

- hal
- name: hal_stm32
revision: d768bcbf9b6f75b46eff274b343a9556c0ce108d
revision: b6f03b6efd92da4564b38df8cb54d7dad5f37163
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Let's drop this, as this was updated via other PRs

Comment on lines +296 to +300
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32mp13_ethernet)
HAL_ETH_TxFreeCallback(heth, (uint32_t *)ctx);
#else
HAL_ETH_TxFreeCallback((uint32_t *)ctx);
#endif
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Proposal:
To avoid redundant ifdefery in the function headers, you can define a custom arg:

		HAL_ETH_TxFreeCallback(STM32_ETH_ARGS(heth, (uint32_t *)ctx));

With:

#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32mp13_ethernet)
#define STM32_ETH_ARGS(foo, VARGS)  foo, VARGS
#else
#define STM32_ETH_ARGS(foo, VARGS)  VARGS
#endif

@erwango erwango added this to the v4.3.0 milestone Oct 17, 2025
Comment on lines +15 to +16
config NET_L2_ETHERNET
default y if NETWORKING
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use configdefault

#define __eth_stm32_desc __attribute__((section(".eth_stm32_desc")))
#define __eth_stm32_buf __attribute__((section(".eth_stm32_buf")))
#elif defined(CONFIG_SOC_SERIES_STM32MP13X)
#define ETH_DMA_REGION DT_PHANDLE(DT_NODELABEL(mac), memory_regions)
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access by Instance and not by label


data->state.is_up = false;

if (!cfg->mdio) {
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use the is device ready function, if at all.


/** @} */

#endif /* ZEPHYR_INCLUDE_ARCH_ARM64_ARM_MEM_H_ */
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-#endif /* ZEPHYR_INCLUDE_ARCH_ARM64_ARM_MEM_H_ */
+#endif /* ZEPHYR_INCLUDE_ARCH_ARM_ARM_MEM_H_ */

switch (flags & K_MEM_CACHE_MASK) {

case K_MEM_CACHE_NONE:
switch (flags & K_MEM_ARM_NC_TYPE_MASK) {
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title of the commit is also after the signature:
Signed-off-by: Arnaud Pouliquen [email protected]arch: arm: mmu: allow selecting memory type for non-cacheable memory

@@ -0,0 +1,27 @@
# Copyright (c) 2025, STMicroelectronics
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Nit:

-The  "st,ext-phyclk" property aligned Linux binding is used to specify
+The "st,ext-phyclk" property aligned Linux binding is used to specify

in the commit message


choice ETH_STM32_HAL_API_VERSION
prompt "STM32Cube HAL Ethernet version"

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also in this commit message:

- - Add support of  PHY with/without crystal 50MHz
+ - Add support of PHY with/without crystal 50MHz


eth_ram: sram@30000000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2FFE0000 DT_SIZE_K(16)>;
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why eth_ram: sram@30000000 and reg = <0x2FFE0000 ?

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4 participants