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Support imx93 video pll driver #98554
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d42fa69
drivers: misc: add NXP i.MX93 Video PLL driver support
RuoshanShi d8e24c0
soc: imx93: enable imx93 video pll
RuoshanShi 9e40ec8
drivers: display: add RM67199 driver support
RuoshanShi 00e91a6
boards: nxp: add shield of NXP MX8_DSI_OLED1A for imx93_evk
RuoshanShi 790ca66
drivers: display: fix CMakeLists.txt indentation
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,33 @@ | ||
| # | ||
| # Copyright 2025 NXP | ||
| # | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
| # | ||
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| if SHIELD_NXP_MX8_DSI_OLED1A | ||
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| if DISPLAY | ||
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| if LVGL | ||
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| config LV_Z_VDB_SIZE | ||
| default 100 | ||
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| config LV_Z_DOUBLE_VDB | ||
| default y | ||
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| config LV_Z_BITS_PER_PIXEL | ||
| default 32 | ||
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| config LV_Z_FULL_REFRESH | ||
| default y | ||
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| choice LV_COLOR_DEPTH | ||
| default LV_COLOR_DEPTH_32 | ||
| endchoice | ||
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| endif # LVGL | ||
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| endif # DISPLAY | ||
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| endif # SHIELD_NXP_MX8_DSI_OLED1A |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| # | ||
| # Copyright 2025 NXP | ||
| # | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
| # | ||
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| config SHIELD_NXP_MX8_DSI_OLED1A | ||
| def_bool $(shields_list_contains,nxp_mx8_dsi_oled1a) |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,49 @@ | ||
| .. _nxp_mx8_dsi_oled1a: | ||
|
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| NXP MX8 DSI OLED1A Panel | ||
| ######################### | ||
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| Overview | ||
| ******** | ||
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| The NXP MX8 DSI OLED1A Panel is a high-resolution OLED display panel | ||
| designed for use with NXP i.MX8 series processors. This panel provides | ||
| excellent color reproduction and contrast ratio through OLED technology. | ||
| The display connects via MIPI DSI interface and offers superior visual | ||
| performance for embedded applications. | ||
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| More information about the panel can be found | ||
| at the `NXP MX8 DSI OLED1A Panel website`_. | ||
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| Current supported displays | ||
| ========================== | ||
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| +--------------+------------------------------+ | ||
| | Display | Shield Designation | | ||
| | | | | ||
| +==============+==============================+ | ||
| | MX8 DSI | nxp_mx8_dsi_oled1a | | ||
| | OLED1A | | | ||
| +--------------+------------------------------+ | ||
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| Programming | ||
| *********** | ||
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| Correct shield designation (see the table above) for your display must | ||
| be entered when you invoke ``west build``. | ||
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| For example: | ||
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| .. zephyr-app-commands:: | ||
| :zephyr-app: samples/subsys/display/lvgl | ||
| :board: imx93_evk/mimx9352/m33/ddr | ||
| :shield: nxp_mx8_dsi_oled1a | ||
| :goals: build | ||
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| References | ||
| ********** | ||
|
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| .. target-notes:: | ||
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| .. _NXP MX8 DSI OLED1A Panel website: | ||
| https://www.nxp.com/part/MX8-DSI-OLED1A |
90 changes: 90 additions & 0 deletions
90
boards/shields/nxp_mx8_dsi_oled1a/nxp_mx8_dsi_oled1a.overlay
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,90 @@ | ||
| /* | ||
| * Copyright 2025 NXP | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| #include <zephyr/dt-bindings/display/panel.h> | ||
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| / { | ||
| chosen { | ||
| zephyr,display = &lcdif; | ||
| }; | ||
| }; | ||
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| &media_blk_ctrl { | ||
| status = "okay"; | ||
| }; | ||
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| &video_pll { | ||
| compatible = "nxp,imx93-video-pll"; | ||
| rdiv = <1>; | ||
| mfi = <121>; | ||
| mfn = <0>; | ||
| mfd = <1>; | ||
| odiv = <6>; | ||
| pll-frequency = <484000000>; | ||
| status = "okay"; | ||
| }; | ||
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| &zephyr_lcdif { | ||
| width = <1080>; | ||
| height = <1920>; | ||
| pixel-format = "argb-8888"; | ||
| media-axi-clk-rate = <400000000>; | ||
| media-apb-clk-rate = <133333334>; | ||
| status = "okay"; | ||
|
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| display-timings { | ||
| compatible = "zephyr,panel-timing"; | ||
| hsync-len = <2>; | ||
| hfront-porch = <20>; | ||
| hback-porch = <34>; | ||
| vsync-len = <2>; | ||
| vfront-porch = <10>; | ||
| vback-porch = <4>; | ||
| de-active = <0>; | ||
| pixelclk-active = <0>; | ||
| hsync-active = <1>; | ||
| vsync-active = <1>; | ||
| clock-frequency = <121000000>; | ||
| }; | ||
| }; | ||
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| &zephyr_mipi_dsi { | ||
| nxp,dc = <&lcdif>; | ||
| dpi-color-coding = "24-bit"; | ||
| dpi-video-mode = "non-burst-sync-pulse"; | ||
| dphy-ref-frequency = <24000000>; | ||
| data-rate-clock = <726000000>; | ||
| status = "okay"; | ||
|
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| rm67199_panel@0 { | ||
| compatible = "raydium,rm67199"; | ||
| reg = <0>; | ||
| bl-gpios = <&gpio_exp0 10 GPIO_ACTIVE_HIGH>; | ||
| reset-gpios = <&gpio_exp0 9 GPIO_ACTIVE_HIGH>; | ||
| data-lanes = <4>; | ||
| pixel-format = <MIPI_DSI_PIXFMT_RGB888>; | ||
| status = "okay"; | ||
| }; | ||
| }; | ||
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| &display_i2c { | ||
| status = "okay"; | ||
|
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| mfd0: adp5585@34 { | ||
| compatible = "adi,adp5585"; | ||
| reg = <0x34>; | ||
| status = "okay"; | ||
|
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| gpio_exp0: adp5585_gpio { | ||
| compatible = "adi,adp5585-gpio"; | ||
| gpio-controller; | ||
| #gpio-cells = <2>; | ||
| ngpios = <13>; | ||
| gpio-reserved-ranges = <5 3>; | ||
| status = "okay"; | ||
| }; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,6 @@ | ||
| shield: | ||
| name: nxp_mx8_dsi_oled1a | ||
| full_name: NXP MX8-DSI-OLED1A | ||
| vendor: nxp | ||
| supported_features: | ||
| - display |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,10 @@ | ||
| # Copyright 2025 NXP | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
|
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| config RM67199 | ||
| bool "RM67199 display driver" | ||
| default y | ||
| select MIPI_DSI | ||
| depends on DT_HAS_RAYDIUM_RM67199_ENABLED | ||
| help | ||
| Enable driver for RM67199 display. |
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Update copyright to 2024-2025
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Fixed, thanks for checking