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Update utility cores to inline hdl variants (Vivado 2024.2+) #1874

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@bluncan bluncan commented Aug 8, 2025

PR Description

With Vivado 2024.2, Xilinx introduced new utility IPs variants called "inline_hdl" that are now recommended and should lead to faster build times.

The old variants are supposedly being removed in the 2026 Vivado release.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

With Vivado 2024.2, Xilinx introduced new utility IPs
variants called "inline_hdl" that are now recommended
and should lead to faster build times.

The old variants are supposedly being removed in the
2026 Vivado release.

Signed-off-by: Bogdan Luncan <[email protected]>
@bluncan bluncan force-pushed the dev_replace_with_inline_hdl branch from a4695d8 to 612ef4b Compare August 8, 2025 10:19
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@FilipG24 FilipG24 left a comment

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Looks good! I tested the ad_ip_instance function and it works well! I recommend a CI build for all affected projects!

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2 participants