v2.2.1

• Release of FPGA Developer AMI 1.18.0 (Rocky Linux 8.10) with Vivado/Vitis 2025.1 tools pre-installed
• Release of Vivado HLx flow
• Fixed TCL glob expression to properly read both .sv and .v files. Credit to @pyz-creeper and @dsw for this update!
• Updated error codes in create-fpga-image for unsupported design logic
• Updated the Virtual Ethernet Application to write the DMA buffer descriptors using the byte alignment required by the CL_SDE example, preventing data alignment errors on Rocky
• Added Amazon FPGA Image (AFI) creation Python script
• Updated XRT version which includes stability fixes for Vitis