Skip to content

Add FABS to canCreateUndefOrPoison #149440

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 4 commits into from
Jul 18, 2025
Merged

Add FABS to canCreateUndefOrPoison #149440

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
dd69161
Add FABS to canCreateUndefOrPoison
Shoreshen Jul 18, 2025
e3d844b
fix test cases name
Shoreshen Jul 18, 2025
cba1a78
Merge branch 'main' into add-fabs-no-undef
Shoreshen Jul 18, 2025
d64a98a
fix cases changed by #148796
Shoreshen Jul 18, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5569,6 +5569,7 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
case ISD::BUILD_VECTOR:
case ISD::BUILD_PAIR:
case ISD::SPLAT_VECTOR:
case ISD::FABS:
return false;

case ISD::ABS:
Expand Down
240 changes: 238 additions & 2 deletions llvm/test/CodeGen/AMDGPU/freeze.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14592,5 +14592,241 @@ define void @freeze_v4i1_vcc(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
store <4 x i1> %freeze, ptr addrspace(1) %ptrb
ret void
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX8-SDAG: {{.*}}

define double @tgt(float %a, double %b, double %c) {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM except function names should be better

; GFX6-SDAG-LABEL: tgt:
; GFX6-SDAG: ; %bb.0:
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-SDAG-NEXT: v_mov_b32_e32 v5, v0
; GFX6-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
; GFX6-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
; GFX6-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX6-GISEL-LABEL: tgt:
; GFX6-GISEL: ; %bb.0:
; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
; GFX6-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
; GFX6-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
; GFX6-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX7-SDAG-LABEL: tgt:
; GFX7-SDAG: ; %bb.0:
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT: v_mov_b32_e32 v5, v0
; GFX7-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
; GFX7-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
; GFX7-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: tgt:
; GFX7-GISEL: ; %bb.0:
; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
; GFX7-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
; GFX7-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
; GFX7-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: tgt:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT: v_mov_b32_e32 v5, v0
; GFX8-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
; GFX8-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
; GFX8-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: tgt:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
; GFX8-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
; GFX8-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
; GFX8-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: tgt:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
; GFX9-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: tgt:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, v0
; GFX10-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
; GFX10-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: tgt:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
; GFX10-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: tgt:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v5, v0
; GFX11-SDAG-NEXT: v_add_f64 v[0:1], |v[4:5]|, v[1:2]
; GFX11-SDAG-NEXT: v_add_f64 v[2:3], |v[4:5]|, v[3:4]
; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: tgt:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_and_b32_e32 v5, 0x7fffffff, v0
; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[4:5], v[1:2]
; GFX11-GISEL-NEXT: v_add_f64 v[2:3], v[4:5], v[3:4]
; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%pv = insertelement <2 x float> poison, float %a, i32 1
%d = bitcast <2 x float> %pv to double
%r = call double @llvm.fabs.f64(double %d)
%fr = freeze double %r
%add1 = fadd double %fr, %b
%add2 = fadd double %fr, %c
%add = fadd double %add1, %add2
ret double %add
}

define <4 x float> @src(<4 x float> %A, <4 x float> %B) {
; GFX6-SDAG-LABEL: src:
; GFX6-SDAG: ; %bb.0:
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX6-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX6-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX6-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX6-GISEL-LABEL: src:
; GFX6-GISEL: ; %bb.0:
; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX6-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX6-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX6-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX6-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX6-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX6-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX6-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX7-SDAG-LABEL: src:
; GFX7-SDAG: ; %bb.0:
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX7-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX7-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX7-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX7-GISEL-LABEL: src:
; GFX7-GISEL: ; %bb.0:
; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX7-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX7-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX7-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX7-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX7-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX7-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX7-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-SDAG-LABEL: src:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX8-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX8-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX8-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: src:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX8-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX8-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX8-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX8-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX8-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX8-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX8-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: src:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX9-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX9-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX9-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX9-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX9-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX9-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX9-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: src:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: src:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX10-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX10-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: src:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX11-SDAG-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX11-SDAG-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: src:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX11-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX11-GISEL-NEXT: v_and_b32_e32 v2, 0x7fffffff, v2
; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0x7fffffff, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%A0 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %A)
%F1 = freeze <4 x float> %A0
%A1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %F1)
ret <4 x float> %A1
}
Loading