Skip to content

Conversation

@raphaelscholle
Copy link

To run higher then 1080p 60fps we need to increase the TMDS clock.

  • raise the TMDS clock validation limit for the Allwinner A83T dw-hdmi bridge so high-refresh CTA modes are accepted
  • extend the H6 HDMI PHY MPLL table with a 297 MHz entry to lock 1080p120 TMDS rates

@RadxaYuntian
Copy link
Member

@RadxaStephen
Copy link
Member

Thanks for your work.
Close it as we don't maintain boards based on H6.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants