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@relokin relokin released this 30 Jun 15:57
ArmARM-M.c
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This release is based on formal concurrency model released with the Arm ARM issue M.c and includes the following changes to the Arm A-profile A64 Instruction Set Architecture:

  • AARCH-25669 Move the ordering rules for LDIAPP/STILP to a new definition
  • AARCH-25405 Clarification οf the IC-Coherence-before and Instruction-read-ordered-before definitions
  • AARCH-24800 Ordering semantics for Load instructions whose destination register is WZR/XZR
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