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@hero78119 hero78119 commented Aug 8, 2025

To close #1004 and #1015

Scope

  • migrate arithmetics-imm/set-less-than-imm/lui/auipc which are imm based to u16 limb circuit
  • limit pc value max to 2^30
  • add ci to test w or w/o u16limb_circuit features

pending tasks

  • migrate jalr => register + imm (2 limb) to pc (1 limb) arithmetics
  • memory load/store imm processing => register (2 limb) + address (1 limb) in rw table lookup
  • shift/shift_imm

circuit stats

+---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
| opcode_name   | num_instances | lookups | reads | witnesses | writes | 0_expr_deg | 0_expr_sumcheck_deg |
+---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
- | OPCODES TOTAL | 0             | 1663    | 210   | 2700      | 210    | [1: 354]   | [2: 144,3: 24]      |
+ | OPCODES TOTAL | 0             | 1685    | 216   | 2744      | 216    | [1: 357]   | [3: 32,2: 158]      |
- | ADDI          | 0             | 9       | 3     | 18        | 3      | [1: 2]     | [2: 2]              |
+ | ADDI          | 0             | 7       | 3     | 18        | 3      | [1: 2]     | [2: 2]              |
+ | AUIPC         | 0             | 15      | 3     | 21        | 3      | [1: 2]     | [2: 3]              |
+ +---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
+ | LUI           | 0             | 8       | 3     | 16        | 3      | [1: 3]     | []                  |
+ +---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
- | SLTI          | 0             | 8       | 3     | 19        | 3      | [1: 3]     | [2: 2]              |
+ | SLTI          | 0             | 8       | 3     | 22        | 3      | [1: 2]     | [2: 7,3: 4]         |
- | SLTIU         | 0             | 7       | 3     | 18        | 3      | [1: 3]     | [2: 1]              |
+ | SLTIU         | 0             | 8       | 3     | 22        | 3      | [1: 2]     | [2: 7,3: 4]         |

benchmark

Performance shows great improvement due to addi lookup reduce from 9 -> 7

Benchmark Median Time (s) Median Change (%)
fibonacci_max_steps_1048576 2.1542 -13.66% (Performance has improved)
fibonacci_max_steps_2097152 3.9548 -14.66% (Performance has improved)
fibonacci_max_steps_4194304 7.6131 -16.07% (Performance has improved)

@hero78119 hero78119 marked this pull request as draft August 8, 2025 11:24
@hero78119 hero78119 marked this pull request as ready for review August 13, 2025 08:06
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block by #1018

@@ -0,0 +1,220 @@
use crate::{
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there is no different for load_v2.rs/load.rs in this PR. Just a place holder for #1013

@@ -0,0 +1,142 @@
use crate::{
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there is no different for store_v2.rs/store.rs in this PR. Just a place holder for #1013

@@ -30,3 +30,4 @@ tracing.workspace = true
[features]
default = ["forbid_overflow"]
forbid_overflow = []
u16limb_circuit = []
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emulator also need this feature to interpret auipc/lui as new chip or with addi

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LGTM 🎉

@kunxian-xia kunxian-xia added this pull request to the merge queue Aug 21, 2025
Merged via the queue into scroll-tech:master with commit 469890b Aug 21, 2025
4 checks passed
github-merge-queue bot pushed a commit that referenced this pull request Aug 25, 2025
To close #1012

based on #1008 

### circuit stats
```diff
+---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
| opcode_name   | num_instances | lookups | reads | witnesses | writes | 0_expr_deg | 0_expr_sumcheck_deg |
+---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
- | JAL           | 0             | 5       | 2     | 11        | 2      | [1: 2]     | []                  |
+ | JAL           | 0             | 8       | 2     | 13        | 2      | [1: 2]     | []                  |
- | JALR          | 0             | 9       | 3     | 22        | 3      | [1: 5]     | [2: 2]              |
+ | JALR          | 0             | 9       | 3     | 22        | 3      | [1: 4]     | [2: 4]              |
+---------------+---------------+---------+-------+-----------+--------+------------+---------------------+
```
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refactor signed imm to support limb based constraints
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