low cost power shield solution

samples/boards/nxp/mimxrt595_evk/system_off/sample.yaml

@@ -7,7 +7,23 @@ sample:
   name: Deep Power Down State Sample for mimxrt595_evk
 common:
   tags: power
+  harness: power
+  harness_config:
+    fixture: pm_probe
+    pytest_dut_scope: session
+    power_measurements:
+      elements_to_trim: 100
+      min_peak_distance: 40
+      min_peak_height: 0.008
+      peak_padding: 40
+      measurement_duration: 20
+      num_of_transitions: 6
+      expected_rms_values: []
+      tolerance_percentage: 20
+    record:
+      regex:
+        - "not used"
+      as_json: ['metrics']
 tests:
   sample.boards.mimxrt595_evk.system_off:
-    build_only: true
     platform_allow: mimxrt595_evk/mimxrt595s/cm33

samples/drivers/adc/adc_power_measure/CMakeLists.txt

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(adc_power_measure)
+
+target_sources(app PRIVATE src/main.c)

samples/drivers/adc/adc_power_measure/Kconfig

@@ -0,0 +1,18 @@
+# Copyright (c) 2024 Centro de Inovacao EDGE.
+# SPDX-License-Identifier: Apache-2.0
+
+config SEQUENCE_SAMPLES
+	int "Number of samples to be made on the sequence for each channel."
+	default 5
+
+config SEQUENCE_RESOLUTION
+	int "Set the resolution of the sequence readings."
+	default 12
+
+config SEQUENCE_32BITS_REGISTERS
+	bool "ADC data sequences are on 32bits"
+
+config SHELL_ADC_PS
+	bool "ADC power shield shell"
+
+source "Kconfig.zephyr"

samples/drivers/adc/adc_power_measure/README.rst

@@ -0,0 +1,85 @@
+.. zephyr:code-sample:: adc_power_measure
+   :name: Analog-to-Digital Converter (ADC) power measurement sample
+   :relevant-api: adc_interface
+
+   Read analog inputs from ADC channels, using a sequence.
+
+Overview
+********
+
+This sample is to used with general power harness to measure the power.
+
+
+Supported platforms
+===================
+
+See overlay files in the boards folder.
+
+Building and Running
+********************
+
+Make sure that the ADC is enabled (``status = "okay";``) and has each channel as a
+child node, with your desired settings like gain, reference, or acquisition time and
+oversampling setting (if used). It is also needed to provide an alias ``adc0`` for the
+desired adc. See :zephyr_file:`boards/frdm_mcxc444.overlay
+<samples/drivers/adc/adc_power_measure/boards/frdm_mcxc444.overlay>` for an example of
+such setup.
+
+Building and Running for NXP frdm_mcxc444
+=========================================
+
+The sample can be built and executed for the
+:zephyr:board:`frdm_mcxc444` as follows:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/drivers/adc/adc_power_measure
+   :board: frdm_mcxc444/mcxc444
+   :goals: build flash
+   :compact:
+
+To build for another board, change "frdm_mcxc444/mcxc444" above to that board's name
+and provide a corresponding devicetree overlay.
+
+Sample output
+=============
+
+the output as below, repeated every time you input any char in the console or ``adc read`` when enable shell:
+
+.. code-block:: console
+
+   ADC sequence reading [1]:
+   - ADC_0, channel 0, 5 sequence samples:
+   - - 36 = 65mV
+   - - 35 = 63mV
+   - - 36 = 65mV
+   - - 35 = 63mV
+   - - 36 = 65mV
+   - ADC_0, channel 1, 5 sequence samples:
+   - - 0 = 0mV
+   - - 0 = 0mV
+   - - 1 = 1mV
+   - - 0 = 0mV
+   - - 1 = 1mV
+
+.. note:: If the ADC is not supported, the output will be an error message.
+
+You should get similar output as below, if you input a return or ``adc status`` when enable shell:
+
+.. code-block:: console
+
+   ==== start of adc features ===
+   CHANNEL_COUNT: 4
+   Resolution: 12
+           channel_id 0 features:
+            - is single mode
+            - verf is 3300 mv
+           channel_id 3 features:
+            - is single mode
+            - verf is 3300 mv
+           channel_id 4 features:
+            - is single mode
+            - verf is 3300 mv
+           channel_id 7 features:
+            - is single mode
+            - verf is 3300 mv
+   ==== end of adc features ===

samples/drivers/adc/adc_power_measure/boards/frdm_k64f.conf

@@ -0,0 +1 @@
+CONFIG_ADC_MCUX_ADC16_VREF_ALTERNATE=y

samples/drivers/adc/adc_power_measure/boards/frdm_k64f.overlay

@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright 2024 NXP
+ */
+
+/ {
+	aliases {
+		adc0 = &adc0;
+	};
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@1 {
+		reg = <1>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_VDD_1";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <16>;
+	};
+};

samples/drivers/adc/adc_power_measure/boards/frdm_mcxc242.conf

@@ -0,0 +1 @@
+CONFIG_ADC_MCUX_ADC16_VREF_ALTERNATE=y

samples/drivers/adc/adc_power_measure/boards/frdm_mcxc242.overlay

@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright 2024 NXP
+ */
+
+/ {
+	aliases {
+		adc0 = &adc0;
+	};
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@1 {
+		reg = <1>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_VDD_1";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+};

samples/drivers/adc/adc_power_measure/boards/frdm_mcxc444.conf

@@ -0,0 +1,19 @@
+CONFIG_ADC_MCUX_ADC16_VREF_ALTERNATE=y
+
+CONFIG_SHELL_ADC_PS=y
+CONFIG_SHELL=y
+CONFIG_SHELL_MINIMAL=y
+CONFIG_SHELL_STACK_SIZE=1024
+CONFIG_SHELL_BACKEND_SERIAL=y
+
+# Power management
+CONFIG_PM=n
+
+# Memory protection
+CONFIG_THREAD_STACK_INFO=n
+CONFIG_THREAD_CUSTOM_DATA=n
+CONFIG_FPU=n
+
+# Boot
+CONFIG_BOOT_BANNER=n
+CONFIG_BOOT_DELAY=0

samples/drivers/adc/adc_power_measure/boards/frdm_mcxc444.overlay

@@ -0,0 +1,68 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright 2024-2025 NXP
+ */
+
+/ {
+	aliases {
+		adc0 = &adc0;
+	};
+};
+
+&pinctrl {
+	pinmux_adc0: pinmux_adc0 {
+		group0 {
+			pinmux = <ADC0_SE0_PTE20>, <ADC0_SE4a_PTE21>,
+				 <ADC0_SE3_PTE22>, <ADC0_SE7a_PTE23>;
+			drive-strength = "low";
+			slew-rate = "slow";
+		};
+	};
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample:
+	 * - Connect ADC0 SE0 signal to voltage between 0~3.3V (J4 pin 1)
+	 */
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_VDD_1";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+
+	channel@3 {
+		reg = <0x3>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_VDD_1";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+
+	channel@4 {
+		reg = <0x4>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_VDD_1";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+
+	channel@7 {
+		reg = <0x7>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_VDD_1";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+};

samples/drivers/adc/adc_power_measure/boards/mimxrt1040_evk.conf

@@ -0,0 +1 @@
+CONFIG_SEQUENCE_RESOLUTION=12

samples/drivers/adc/adc_power_measure/boards/mimxrt1040_evk.overlay

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2024 Centro de Inovacao EDGE
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		adc0 = &adc1;
+	};
+};
+
+&adc1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample connect
+	 * J33.1 (ADC1 CH3) and J33.2 (ADC1 CH4) to voltages between 0 and 3.3V
+	 */
+	channel@3 {
+		reg = <3>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+	};
+
+	channel@4 {
+		reg = <4>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+	};
+};

samples/drivers/adc/adc_power_measure/boards/mimxrt595_evk_cm33.conf

@@ -0,0 +1 @@
+CONFIG_SEQUENCE_RESOLUTION=12

samples/drivers/adc/adc_power_measure/boards/mimxrt595_evk_cm33.overlay

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2024 Centro de Inovacao EDGE
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	aliases {
+		adc0 = &lpadc0;
+	};
+};
+
+&lpadc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * To use this sample:
+	 * LPADC0 CH0A and CH0B are set up in differential mode (B-A)
+	 * - Connect LPADC0 CH0A signal to voltage between 0~1.8V (J30 pin 1)
+	 * - Connect LPADC0 CH0B signal to voltage between 0~1.8V (J30 pin 2)
+	 * LPADC0 CH2A is set up in single ended mode
+	 * - Connect LPADC0 CH2A signal to voltage between 0~1.8V (J30 pin 3)
+	 */
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <1800>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,input-positive = <MCUX_LPADC_CH0B>;
+		zephyr,input-negative = <MCUX_LPADC_CH0A>;
+	};
+
+	channel@1 {
+		reg = <1>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <1800>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,input-positive = <MCUX_LPADC_CH2A>;
+	};
+};

samples/drivers/adc/adc_power_measure/prj.conf

@@ -0,0 +1 @@
+CONFIG_ADC=y