Addition of PLLSAI on STM32F4/F7 and enabling of LTDC/DSI on STM32F769I-disco board #95200
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zephyrbot
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area: Clock Control
area: Display
area: Shields
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August 30, 2025 18:01
Add description of the PLLSAI of the stm32f7x Signed-off-by: Alain Volmat <[email protected]>
Add description of the PLLSAI of the stm32f4x Signed-off-by: Alain Volmat <[email protected]>
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August 30, 2025 19:26
Add code handling the pllsai. It is similar to the pllsai1 pllsai2 which can be found on some other socs, except, depending on the socs the fact that pllsai source can be or not common with other plls and moreover it can also have additional DIV_DIVQ and DIV_DIVR additional dividers. Choice is made to add PLLSAI instead of add further support to PLLSAI1, in order to stick to the proper naming of the PLLs. Signed-off-by: Alain Volmat <[email protected]>
Add description of the pllsai PLL found on the stm32f7 series. Signed-off-by: Alain Volmat <[email protected]>
Not all STM32F4 embeds a PLLSAI hence this is added in stm32f405.dtsi and stm32f446.dtsi. Signed-off-by: Alain Volmat <[email protected]>
Add the pllsai configuration for boards that enables the LTDC and are relying on the LTDC driver to perform the PLLSAI configuration. This will allow to remove the PLLSAI code from the LTDC driver. Impacted boards are: boards/st/stm32f429i_disc1/stm32f429i_disc1.dts boards/st/stm32f746g_disco/stm32f746g_disco.dts boards/st/stm32f7508_dk/stm32f7508_dk.dts Signed-off-by: Alain Volmat <[email protected]>
Now that PLLSAI can be configured via the device-tree, remove the SOC specific PLLSAI configuration from the LTDC driver. Signed-off-by: Alain Volmat <[email protected]>
Describe the DSI block available from STM32F767 and onward and allow to output data generated by the LTDC to a DSI panel. Signed-off-by: Alain Volmat <[email protected]>
Add the description of the DSI connector available on the stm32f769i_disco board and zephyr_mipi_dsi/zephyr_lcd_controller alias to be used by display shields. Signed-off-by: Alain Volmat <[email protected]>
Add overlay and conf file dedicated for the stm32f769i_disco. Signed-off-by: Alain Volmat <[email protected]>
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gautierg-st
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Sep 1, 2025
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| with f(VCO clock) = f(PLL clock input) × (PLLSAIN / PLLSAIM) | ||
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| This PLL is only available on STM32F4x5/STM32F4x7/STM32F4x9 and STM32F446xx. |
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Not exactly, it is not present on F405/407/415/417
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| /* | ||
| * In case there is no dedicated M_DIVISOR for PLLSAI, the input is shared | ||
| * with PLL and PLLI2S. Ensure that if they exist, they have the same value | ||
| */ | ||
| #if !defined(RCC_PLLSAICFGR_PLLSAIM) | ||
| #if defined(STM32_PLL_M_DIVISOR) && (STM32_PLL_M_DIVISOR != STM32_PLLSAI_M_DIVISOR) | ||
| #error "PLLSAI M divisor must have same value as PLL M divisor" |
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Ideally, you should also check that PLLI2S_M is equal to PLLSAI_M (if both are enabled) in case there is no PLL_M.
There should also be a check that PLL_M is equal to PLLI2S_M (when both are enabled) but that is not necessarily the scope of this PR.
| pllsai: pllsai { | ||
| #clock-cells = <0>; | ||
| compatible = "st,stm32f4-pllsai-clock"; | ||
| status = "disabled"; |
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F405/407/415/417 don't have PLLSAI (they have a different clock tree than F427/429/437/439). It should be added in F427.
Commit comment also needs to be updated.
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This PR add the PLLSAI support for the STM32F4 and F7 series. It is quite similar to the PLLSAI1 and PLLSAI2 added recently for the L4 series except the naming of the PLL (which is not PLLSAI1 but PLLSAI) and moreover has, depending on the soc, additional outputs and variants regarding the availability of the M divider, P / Q / R outputs as well as extra divider after Q and R outputs.
I have been wondering if it was better to introduce a new PLLSAI instead of relying on the PLLSAI1 and chose to add PLLSAI. This is a point of discussion I think. PLLSAI is the real name found in documentation on F series, there is no mention of PLLSAI1.
It slightly differ in the sense that on those series, there is no dedicated enable bit per PLLSAI output. That said, in the parsing of the DT I still kept the _ENABLED macro, indicated basically which has been found within the DT hence, which should be set, it could be renamed as _SET or so maybe.
The PLLSAI HAL functions for enabling / disabling the whole PLL have also different names, with obviously no 1 or 2 suffix in the name.
One goal of this PR was also to get rid of the PLLSAI code part of the LTDC driver. I removed that and added corresponding device-tree entry for those boards. I would be interested if someone could give it a try on those boards since I do not have them at hand so couldn't test for non-regression.
At last, STM32F769i-disco support is added. This one has a DSI output and rely on the st_b_lcd shield. I have a A-03 version of it and could test it properly, using various test app, display, lvgl or lvgl demo.
I noticed that part of the stm32f769i_disco.dts file, there is a touch panel defined, which I'd suspect is the one from the panel, however this doesn't have the same address as the one really available on the shield (at least the one I have) and the one described on the shield overlay. I'm pretty sure this should be removed since it isn't available on-board so shouldn't be described on the dts file but I'd be happy to understand to what it was suppose to refer to. At least on the board / shield I have, the address described in the shield, aka 0x38 is the right one ... not 0x2a.